[Beignet] Low latency io

[Svein Berge]

Hello, Beignet list!

I'm doing a project that involves low latency i/o. I could use a solution
like gpudirect (nvidia) or directgma (amd), but these are only available on
high end cards which would otherwise be overkill for my project. As far as
I understand the intel processor architecture (which is admittedly not very
far), it should be possible to do something similar on intel graphics
hardware with relatively simple means.

The idea is to set up an i/o device to read/write data to/from a physical
memory area which is mapped into an opencl buffer (using svm or possibly
even ocl1.2-style mapping).

The problem is to synchronize the i/o device with the kernel. With svm
atomics you could maybe busy-wait in the kernel, but this option is not
(yet) available. Without atomics, the busy-wait loop will simply access the
cache and not see that the system memory is updated by the i/o device. You
could also let the cpu handle synchronization, but given the low latency
requirements of this project, that requires at least an rt-patched
kernel, wasting a whole cpu core just for busy-waiting plus the enqueueing
overhead.

As far as I understand, the only thing required to allow busy-waiting in
a kernel is (in absence of atomics) the ability to invalidate a cache line
from the kernel. Is there any way to do this that I have overlooked?

Cheers,

Svein Berge
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