[Beignet] [PATCH] GBE: Fix a logical insn with flag bug.
Pan, Xiuli
xiuli.pan at intel.com
Tue Nov 1 07:24:10 UTC 2016
LGTM!
It is a flag conflict condition.
-----Original Message-----
From: Beignet [mailto:beignet-bounces at lists.freedesktop.org] On Behalf Of Yang Rong
Sent: Monday, October 31, 2016 6:44 PM
To: beignet at lists.freedesktop.org
Cc: Yang, Rong R <rong.r.yang at intel.com>
Subject: [Beignet] [PATCH] GBE: Fix a logical insn with flag bug.
If dst is a bool reg, the insn may modify flag, can't use this flag as predication, so can't remove if/endif. For example ir:
%or.cond1244 = or i1 %cmp.i338, %cmp2.i403
%or.cond1245 = or i1 %or.cond1244, %cmp3.i405
asm:
(+f0.0) or.ne(16) g20<1>:W g9<8,8,1>:W g1<8,8,1>:W
(+f1.1) or.ne.f1.1(16) g21<1>:W g20<8,8,1>:W g30<8,8,1>:W
The second insn is error.
Signed-off-by: Yang Rong <rong.r.yang at intel.com>
---
backend/src/backend/gen_insn_selection.cpp | 10 ++++++++++
1 file changed, 10 insertions(+)
diff --git a/backend/src/backend/gen_insn_selection.cpp b/backend/src/backend/gen_insn_selection.cpp
index d506d96..2b89c7f 100644
--- a/backend/src/backend/gen_insn_selection.cpp
+++ b/backend/src/backend/gen_insn_selection.cpp
@@ -2223,6 +2223,16 @@ namespace gbe
if (!ld.isAligned())
return false;
}
+ //If dst is a bool reg, the insn may modify flag, can't use this flag
+ //as predication, so can't remove if/endif. For example ir:
+ //%or.cond1244 = or i1 %cmp.i338, %cmp2.i403
+ //%or.cond1245 = or i1 %or.cond1244, %cmp3.i405
+ //asm:
+ //(+f1.0) or.ne(16) g20<1>:W g9<8,8,1>:W g1<8,8,1>:W
+ //(+f1.1) or.ne.f1.1(16) g21<1>:W g20<8,8,1>:W g30<8,8,1>:W
+ //The second insn is error.
+ if(insn.getDstNum() && getRegisterFamily(insn.getDst(0)) == ir::FAMILY_BOOL)
+ return false;
}
// there would generate a extra CMP instruction for predicated BRA with extern flag,
--
2.1.4
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