[Beignet] [PATCH 2/2] do not care dst for printf

[Yang, Rong R]

Pushed, thanks.

> -----Original Message-----
> From: Beignet [mailto:beignet-bounces at lists.freedesktop.org] On Behalf Of
> Yan Wang
> Sent: Wednesday, November 30, 2016 14:22
> To: Guo, Yejun <yejun.guo at intel.com>; beignet at lists.freedesktop.org
> Subject: Re: [Beignet] [PATCH 2/2] do not care dst for printf
> 
> LGTM.
> Thanks.
> 
> Yan Wang
> 
> On Mon, 2016-11-21 at 18:16 +0800, Guo, Yejun wrote:
> > acutally, the dst of printf means nothing, don't need to touch it.
> >
> > Signed-off-by: Guo, Yejun <yejun.guo at intel.com>
> > ---
> >  backend/src/backend/gen_context.cpp        | 14 ++------------
> >  backend/src/backend/gen_insn_selection.cpp | 20 +++++++++-----------
> >  2 files changed, 11 insertions(+), 23 deletions(-)
> >
> > diff --git a/backend/src/backend/gen_context.cpp
> > b/backend/src/backend/gen_context.cpp
> > index 186c8d9..a73ccb6 100644
> > --- a/backend/src/backend/gen_context.cpp
> > +++ b/backend/src/backend/gen_context.cpp
> > @@ -3469,9 +3469,8 @@ namespace gbe
> >    }
> >
> >    void GenContext::emitPrintfInstruction(const SelectionInstruction
> > &insn) {
> > -    const GenRegister dst = ra->genReg(insn.dst(0));
> > -    const GenRegister tmp0 = ra->genReg(insn.dst(1));
> > -    const GenRegister tmp1 = ra->genReg(insn.dst(2));
> > +    const GenRegister tmp0 = ra->genReg(insn.dst(0));
> > +    const GenRegister tmp1 = ra->genReg(insn.dst(1));
> >      GenRegister src;
> >      uint32_t srcNum = insn.srcNum;
> >
> > @@ -3518,15 +3517,6 @@ namespace gbe
> >          emitPrintfLongInstruction(addr, data, src,
> > insn.extra.printfBTI);
> >        }
> >      }
> > -
> > -    if (dst.hstride == GEN_HORIZONTAL_STRIDE_0) {
> > -      p->push();
> > -      p->curr.execWidth = 1;
> > -    }
> > -    p->MOV(dst, GenRegister::immd(0));
> > -    if (dst.hstride == GEN_HORIZONTAL_STRIDE_0) {
> > -      p->pop();
> > -    }
> >    }
> >
> >    void GenContext::setA0Content(uint16_t new_a0[16], uint16_t
> > max_offset, int sz) { diff --git
> > a/backend/src/backend/gen_insn_selection.cpp
> > b/backend/src/backend/gen_insn_selection.cpp
> > index 1808c7b..88fe1a6 100644
> > --- a/backend/src/backend/gen_insn_selection.cpp
> > +++ b/backend/src/backend/gen_insn_selection.cpp
> > @@ -705,7 +705,7 @@ namespace gbe
> >      /*! Store the profiling info */
> >      void STORE_PROFILING(uint32_t profilingType, uint32_t bti,
> > GenRegister tmp0, GenRegister tmp1, GenRegister ts[5], int tsNum);
> >      /*! Printf */
> > -    void PRINTF(GenRegister dst, uint8_t bti, GenRegister tmp0,
> > GenRegister tmp1, GenRegister src[8],
> > +    void PRINTF(uint8_t bti, GenRegister tmp0, GenRegister tmp1,
> > GenRegister src[8],
> >                  int srcNum, uint16_t num, bool isContinue, uint32_t
> > totalSize);
> >      /*! Multiply 64-bit integers */
> >      void I64MUL(Reg dst, Reg src0, Reg src1, GenRegister *tmp, bool
> > native_long); @@ -2129,20 +2129,19 @@ namespace gbe
> >      }
> >    }
> >
> > -  void Selection::Opaque::PRINTF(GenRegister dst, uint8_t bti,
> > GenRegister tmp0, GenRegister tmp1,
> > +  void Selection::Opaque::PRINTF(uint8_t bti, GenRegister tmp0,
> > GenRegister tmp1,
> >                 GenRegister src[8], int srcNum, uint16_t num, bool
> > isContinue, uint32_t totalSize) {
> > -    SelectionInstruction *insn = this->appendInsn(SEL_OP_PRINTF, 3,
> > srcNum);
> > +    SelectionInstruction *insn = this->appendInsn(SEL_OP_PRINTF, 2,
> > srcNum);
> >      SelectionVector *vector = this->appendVector();
> >
> >      for (int i = 0; i < srcNum; i++)
> >        insn->src(i) = src[i];
> >
> > -    insn->dst(0) = dst;
> > -    insn->dst(1) = tmp0;
> > -    insn->dst(2) = tmp1;
> > +    insn->dst(0) = tmp0;
> > +    insn->dst(1) = tmp1;
> >
> >      vector->regNum = 2;
> > -    vector->reg = &insn->dst(1);
> > +    vector->reg = &insn->dst(0);
> >      vector->offsetID = 0;
> >      vector->isSrc = 0;
> >
> > @@ -7041,8 +7040,7 @@ extern bool OCL_DEBUGINFO; // first defined by
> > calling BVAR in program.cpp
> >        uint8_t BTI = insn.getBti();
> >        GenRegister tmp0, tmp1;
> >        uint32_t srcNum = insn.getSrcNum();
> > -      GenRegister dst = sel.selReg(insn.getDst(0), TYPE_S32);
> > -      //GBE_ASSERT(srcNum);
> > +
> >        uint32_t i = 0;
> >        uint32_t totalSize = 0;
> >        bool isContinue = false;
> > @@ -7063,14 +7061,14 @@ extern bool OCL_DEBUGINFO; // first defined
> by
> > calling BVAR in program.cpp
> >        i = 0;
> >        GenRegister regs[8];
> >        if (srcNum == 0) {
> > -          sel.PRINTF(dst, BTI, tmp0, tmp1, regs, srcNum, num,
> > isContinue, totalSize);
> > +          sel.PRINTF(BTI, tmp0, tmp1, regs, srcNum, num, isContinue,
> > totalSize);
> >        } else {
> >          do {
> >            uint32_t s = srcNum < 8 ? srcNum : 8;
> >            for (uint32_t j = 0; j < s; j++) {
> >              regs[j] = sel.selReg(insn.getSrc(i + j), insn.getType(i
> > + j));
> >            }
> > -          sel.PRINTF(dst, BTI, tmp0, tmp1, regs, s, num, isContinue,
> > totalSize);
> > +          sel.PRINTF(BTI, tmp0, tmp1, regs, s, num, isContinue,
> > totalSize);
> >
> >            if (srcNum > 8) {
> >              srcNum -= 8;
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