[Beignet] [PATCH 1/3] Backend: Add kernel name for sel ir output

[Xiuli Pan]

From: Pan Xiuli <xiuli.pan at intel.com>

Signed-off-by: Pan Xiuli <xiuli.pan at intel.com>
---
 backend/src/backend/gen_context.cpp               | 2 +-
 backend/src/backend/gen_insn_selection_output.cpp | 6 +++---
 backend/src/backend/gen_insn_selection_output.hpp | 2 +-
 3 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/backend/src/backend/gen_context.cpp b/backend/src/backend/gen_context.cpp
index 1c09c79..439b868 100644
--- a/backend/src/backend/gen_context.cpp
+++ b/backend/src/backend/gen_context.cpp
@@ -3841,7 +3841,7 @@ namespace gbe
     if (OCL_OPTIMIZE_SEL_IR)
       sel->optimize();
     if (OCL_OUTPUT_SEL_IR)
-      outputSelectionIR(*this, this->sel);
+      outputSelectionIR(*this, this->sel, genKernel->getName());
     schedulePreRegAllocation(*this, *this->sel);
     if (UNLIKELY(ra->allocate(*this->sel) == false))
       return false;
diff --git a/backend/src/backend/gen_insn_selection_output.cpp b/backend/src/backend/gen_insn_selection_output.cpp
index ed26650..7bdd8fd 100644
--- a/backend/src/backend/gen_insn_selection_output.cpp
+++ b/backend/src/backend/gen_insn_selection_output.cpp
@@ -96,9 +96,9 @@ namespace gbe
   }
 
 #define OP_NAME_LENGTH 512
-  void outputSelectionIR(GenContext &ctx, Selection* sel)
+  void outputSelectionIR(GenContext &ctx, Selection* sel, const char* KernelName)
   {
-    cout << "SELECTION IR begin:" << endl;
+    cout << KernelName <<"'s SELECTION IR begin:" << endl;
     cout << "WARNING: not completed yet, welcome for the FIX!" << endl;
     for (SelectionBlock &block : *sel->blockList) {
       for (SelectionInstruction &insn : block.insnList) {
@@ -166,7 +166,7 @@ namespace gbe
       }
       cout << endl;
     }
-    cout << "SELECTION IR end." << endl << endl;
+    cout <<KernelName << "'s SELECTION IR end." << endl << endl;
   }
 
 }
diff --git a/backend/src/backend/gen_insn_selection_output.hpp b/backend/src/backend/gen_insn_selection_output.hpp
index dd372dc..e1c72af 100644
--- a/backend/src/backend/gen_insn_selection_output.hpp
+++ b/backend/src/backend/gen_insn_selection_output.hpp
@@ -6,7 +6,7 @@ namespace gbe
   class Selection;  // Pre ISA code
   class GenContext; // Handle compilation for Gen
 
-  void outputSelectionIR(GenContext &ctx, Selection* sel);
+  void outputSelectionIR(GenContext &ctx, Selection* sel, const char* KernelName);
 
 } /* namespace gbe */
 
-- 
2.7.4