[Beignet] [PATCH] Backend: add double support to convert_uchar|char|short|ushort|int|uint|long|ulong_sat(double x) HW support Double to int16, int32 from IVB, others done by software. Double to int64 is supported by BWD+, now skip it and refine it later

[rander]

Signed-off-by: rander <rander.wang at intel.com>
---
 backend/src/libocl/script/ocl_convert.sh   | 10 +++++++++-
 backend/src/llvm/llvm_gen_backend.cpp      | 12 ++++++++++++
 backend/src/llvm/llvm_gen_ocl_function.hxx |  4 ++++
 3 files changed, 25 insertions(+), 1 deletion(-)

diff --git a/backend/src/libocl/script/ocl_convert.sh b/backend/src/libocl/script/ocl_convert.sh
index 7599a66..adac9b1 100755
--- a/backend/src/libocl/script/ocl_convert.sh
+++ b/backend/src/libocl/script/ocl_convert.sh
@@ -138,14 +138,18 @@ DEF(short, ushort);
 DEF(short, int);
 DEF(short, uint);
 DEF(short, float);
+DEF(short, double);
 DEF(ushort, short);
 DEF(ushort, int);
 DEF(ushort, uint);
 DEF(ushort, float);
+DEF(ushort, double);
 DEF(int, uint);
 DEF(int, float);
+DEF(int, double);
 DEF(uint, int);
 DEF(uint, float);
+DEF(uint, double);
 DEF(char, half);
 DEF(uchar, half);
 DEF(short, half);
@@ -195,6 +199,10 @@ fi
 echo '
 DEF(long, float, -0x1.0p63, 0x1.0p63, 0x8000000000000000, 0x7fffffffffffffff);
 DEF(ulong, float, 0, 0x1.0p64, 0, 0xffffffffffffffff);
+DEF(char, double, -0x1.0p7, 0x1.0p7,  0x80, 0x7F);
+DEF(uchar, double, 0, 0x1.0p8, 0, 0xFF);
+DEF(long, double, -0x1.0p63, 0x1.0p63, 0x8000000000000000, 0x7FFFFFFFFFFFFFFF);
+DEF(ulong, double, 0, 0x1.0p64, 0, 0xFFFFFFFFFFFFFFFF);
 #undef DEF
 '
 
@@ -335,7 +343,7 @@ for vector_length in $VECTOR_LENGTHS; do
 
     for ftype in $TYPES; do
 	fbasetype=`IFS=:; set -- dummy $ftype; echo $2`
-	if test $fbasetype = "double"; then continue; fi
+	#if test $fbasetype = "double"; then continue; fi
 
 	for ttype in $TYPES; do
 	    tbasetype=`IFS=:; set -- dummy $ttype; echo $2`
diff --git a/backend/src/llvm/llvm_gen_backend.cpp b/backend/src/llvm/llvm_gen_backend.cpp
index 3fefa92..18ae3d5 100644
--- a/backend/src/llvm/llvm_gen_backend.cpp
+++ b/backend/src/llvm/llvm_gen_backend.cpp
@@ -3995,14 +3995,18 @@ namespace gbe
       case GEN_OCL_SAT_CONV_I32_TO_I16:
       case GEN_OCL_SAT_CONV_U32_TO_I16:
       case GEN_OCL_SAT_CONV_F32_TO_I16:
+      case GEN_OCL_SAT_CONV_F64_TO_I16:
       case GEN_OCL_SAT_CONV_I16_TO_U16:
       case GEN_OCL_SAT_CONV_I32_TO_U16:
       case GEN_OCL_SAT_CONV_U32_TO_U16:
       case GEN_OCL_SAT_CONV_F32_TO_U16:
+      case GEN_OCL_SAT_CONV_F64_TO_U16:
       case GEN_OCL_SAT_CONV_U32_TO_I32:
       case GEN_OCL_SAT_CONV_F32_TO_I32:
+      case GEN_OCL_SAT_CONV_F64_TO_I32:
       case GEN_OCL_SAT_CONV_I32_TO_U32:
       case GEN_OCL_SAT_CONV_F32_TO_U32:
+      case GEN_OCL_SAT_CONV_F64_TO_U32:
       case GEN_OCL_SAT_CONV_F16_TO_I8:
       case GEN_OCL_SAT_CONV_F16_TO_U8:
       case GEN_OCL_SAT_CONV_F16_TO_I16:
@@ -5207,6 +5211,8 @@ namespace gbe
             DEF(ir::TYPE_S16, ir::TYPE_U32);
           case GEN_OCL_SAT_CONV_F32_TO_I16:
             DEF(ir::TYPE_S16, ir::TYPE_FLOAT);
+          case GEN_OCL_SAT_CONV_F64_TO_I16:
+            DEF(ir::TYPE_S16, ir::TYPE_DOUBLE);
           case GEN_OCL_SAT_CONV_I16_TO_U16:
             DEF(ir::TYPE_U16, ir::TYPE_S16);
           case GEN_OCL_SAT_CONV_I32_TO_U16:
@@ -5215,14 +5221,20 @@ namespace gbe
             DEF(ir::TYPE_U16, ir::TYPE_U32);
           case GEN_OCL_SAT_CONV_F32_TO_U16:
             DEF(ir::TYPE_U16, ir::TYPE_FLOAT);
+          case GEN_OCL_SAT_CONV_F64_TO_U16:
+            DEF(ir::TYPE_U16, ir::TYPE_DOUBLE);
           case GEN_OCL_SAT_CONV_U32_TO_I32:
             DEF(ir::TYPE_S32, ir::TYPE_U32);
           case GEN_OCL_SAT_CONV_F32_TO_I32:
             DEF(ir::TYPE_S32, ir::TYPE_FLOAT);
+          case GEN_OCL_SAT_CONV_F64_TO_I32:
+            DEF(ir::TYPE_S32, ir::TYPE_DOUBLE);
           case GEN_OCL_SAT_CONV_I32_TO_U32:
             DEF(ir::TYPE_U32, ir::TYPE_S32);
           case GEN_OCL_SAT_CONV_F32_TO_U32:
             DEF(ir::TYPE_U32, ir::TYPE_FLOAT);
+          case GEN_OCL_SAT_CONV_F64_TO_U32:
+            DEF(ir::TYPE_U32, ir::TYPE_DOUBLE);
           case GEN_OCL_SAT_CONV_F16_TO_I8:
             DEF(ir::TYPE_S8, ir::TYPE_HALF);
           case GEN_OCL_SAT_CONV_F16_TO_U8:
diff --git a/backend/src/llvm/llvm_gen_ocl_function.hxx b/backend/src/llvm/llvm_gen_ocl_function.hxx
index 86485da..3874c38 100644
--- a/backend/src/llvm/llvm_gen_ocl_function.hxx
+++ b/backend/src/llvm/llvm_gen_ocl_function.hxx
@@ -139,17 +139,21 @@ DECL_LLVM_GEN_FUNCTION(SAT_CONV_U16_TO_I16, _Z17convert_short_satt)
 DECL_LLVM_GEN_FUNCTION(SAT_CONV_I32_TO_I16, _Z17convert_short_sati)
 DECL_LLVM_GEN_FUNCTION(SAT_CONV_U32_TO_I16, _Z17convert_short_satj)
 DECL_LLVM_GEN_FUNCTION(SAT_CONV_F32_TO_I16, _Z17convert_short_satf)
+DECL_LLVM_GEN_FUNCTION(SAT_CONV_F64_TO_I16, _Z17convert_short_satd)
 
 DECL_LLVM_GEN_FUNCTION(SAT_CONV_I16_TO_U16, _Z18convert_ushort_sats)
 DECL_LLVM_GEN_FUNCTION(SAT_CONV_I32_TO_U16, _Z18convert_ushort_sati)
 DECL_LLVM_GEN_FUNCTION(SAT_CONV_U32_TO_U16, _Z18convert_ushort_satj)
 DECL_LLVM_GEN_FUNCTION(SAT_CONV_F32_TO_U16, _Z18convert_ushort_satf)
+DECL_LLVM_GEN_FUNCTION(SAT_CONV_F64_TO_U16,_Z18convert_ushort_satd)
 
 DECL_LLVM_GEN_FUNCTION(SAT_CONV_U32_TO_I32, _Z15convert_int_satj)
 DECL_LLVM_GEN_FUNCTION(SAT_CONV_F32_TO_I32, _Z15convert_int_satf)
+DECL_LLVM_GEN_FUNCTION(SAT_CONV_F64_TO_I32, _Z15convert_int_satd)
 
 DECL_LLVM_GEN_FUNCTION(SAT_CONV_I32_TO_U32, _Z16convert_uint_sati)
 DECL_LLVM_GEN_FUNCTION(SAT_CONV_F32_TO_U32, _Z16convert_uint_satf)
+DECL_LLVM_GEN_FUNCTION(SAT_CONV_F64_TO_U32, _Z16convert_uint_satd)
 
 DECL_LLVM_GEN_FUNCTION(CONV_F16_TO_F32, __gen_ocl_f16to32)
 DECL_LLVM_GEN_FUNCTION(CONV_F32_TO_F16, __gen_ocl_f32to16)
-- 
2.7.4