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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Hi Svein,<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">You will need some drm and intel linux kernel that later then 2016, Jan( I did not know the expect commit or date that they support what we need for SVM).<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">And for llvm3.8 you only need a simple patch for pipe built-in to clang, you can download it from
<a href="http://reviews.llvm.org/D15603">http://reviews.llvm.org/D15603</a>.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">If you find anything wrong please feel free to ask, the OpenCL 2.0 is still under developed and we are welcomed you to have a try to see if there is any bug.<o:p></o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></p>
<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">Thanks<br>
Xiuli<o:p></o:p></span></p>
<p class="MsoNormal"><a name="_MailEndCompose"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"><o:p> </o:p></span></a></p>
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<p class="MsoNormal"><a name="_____replyseparator"></a><b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif">From:</span></b><span style="font-size:11.0pt;font-family:"Calibri",sans-serif"> Beignet [mailto:beignet-bounces@lists.freedesktop.org]
<b>On Behalf Of </b>Svein Berge<br>
<b>Sent:</b> Saturday, March 26, 2016 5:48 PM<br>
<b>To:</b> Pan, Xiuli <xiuli.pan@intel.com><br>
<b>Cc:</b> beignet@lists.freedesktop.org<br>
<b>Subject:</b> Re: [Beignet] Low latency io<o:p></o:p></span></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">Hello Xiuli,<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">that’s great news! I tested the OCL20 branch in January. I don’t think it supported SVM atomics then, and I couldn’t get the OCL20 branch to build when I tried again last week. I will make a new attempt next week. You mention the need for
an llvm patch to build it - could you tell me which patch that is?<o:p></o:p></p>
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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">I have some question about the old style way, is the kernel need to be running all the time as the io changes the memory? And do some response to it at a low
latency?</span><o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">That is correct.<o:p></o:p></p>
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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D"> </span><o:p></o:p></p>
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<p class="MsoNormal"><span style="font-size:11.0pt;font-family:"Calibri",sans-serif;color:#1F497D">And could you explain the idea about how “invalidate a cache line from the kernel” can help with you requires?</span><o:p></o:p></p>
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<p class="MsoNormal">The idea is to write a loop in opencl which polls a memory location and flushes that memory location from cache so it will be read from system memory each time. But my understanding of the caching and coherence mechanisms involved is not
good. Anyway, this point should be moot if you now support SVM atomics.<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">Cheers,<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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<p class="MsoNormal">Svein<o:p></o:p></p>
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<p class="MsoNormal"><o:p> </o:p></p>
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