[PATCH] drm/radeon/kms: adjust pll settings for tv
Alex Deucher
alexdeucher at gmail.com
Fri Apr 9 12:31:56 PDT 2010
May fix fdo bug 26582.
Signed-off-by: Alex Deucher <alexdeucher at gmail.com>
---
drivers/gpu/drm/radeon/atombios_crtc.c | 4 ++++
1 files changed, 4 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c
b/drivers/gpu/drm/radeon/atombios_crtc.c
index 6300675..3feca6a 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -517,6 +517,10 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
/* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */
if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1)
adjusted_clock = mode->clock * 2;
+ if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) {
+ pll->algo = PLL_ALGO_LEGACY;
+ pll->flags |= RADEON_PLL_PREFER_CLOSEST_LOWER;
+ }
} else {
if (encoder->encoder_type != DRM_MODE_ENCODER_DAC)
pll->flags |= RADEON_PLL_NO_ODD_POST_DIV;
--
1.5.6.3
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Content-Type: text/x-diff; charset=US-ASCII;
name="0001-drm-radeon-kms-adjust-pll-settings-for-tv.patch"
Content-Disposition: attachment;
filename="0001-drm-radeon-kms-adjust-pll-settings-for-tv.patch"
Content-Transfer-Encoding: base64
X-Attachment-Id: f_g7xh3aqm0
RnJvbSBjNjk0OTMwNjY0ODliMzUxNTQ0ZGRlY2FjNjVmMzUwYzg4NTE3NTRlIE1vbiBTZXAgMTcg
MDA6MDA6MDAgMjAwMQpGcm9tOiBBbGV4IERldWNoZXIgPGFsZXhkZXVjaGVyQGdtYWlsLmNvbT4K
RGF0ZTogRnJpLCA5IEFwciAyMDEwIDE1OjMxOjU2IC0wNDAwClN1YmplY3Q6IFtQQVRDSF0gZHJt
L3JhZGVvbi9rbXM6IGFkanVzdCBwbGwgc2V0dGluZ3MgZm9yIHR2CgpNYXkgZml4IGZkbyBidWcg
MjY1ODIuCgpTaWduZWQtb2ZmLWJ5OiBBbGV4IERldWNoZXIgPGFsZXhkZXVjaGVyQGdtYWlsLmNv
bT4KLS0tCiBkcml2ZXJzL2dwdS9kcm0vcmFkZW9uL2F0b21iaW9zX2NydGMuYyB8ICAgIDQgKysr
KwogMSBmaWxlcyBjaGFuZ2VkLCA0IGluc2VydGlvbnMoKyksIDAgZGVsZXRpb25zKC0pCgpkaWZm
IC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL3JhZGVvbi9hdG9tYmlvc19jcnRjLmMgYi9kcml2ZXJz
L2dwdS9kcm0vcmFkZW9uL2F0b21iaW9zX2NydGMuYwppbmRleCA2MzAwNjc1Li4zZmVjYTZhIDEw
MDY0NAotLS0gYS9kcml2ZXJzL2dwdS9kcm0vcmFkZW9uL2F0b21iaW9zX2NydGMuYworKysgYi9k
cml2ZXJzL2dwdS9kcm0vcmFkZW9uL2F0b21iaW9zX2NydGMuYwpAQCAtNTE3LDYgKzUxNywxMCBA
QCBzdGF0aWMgdTMyIGF0b21iaW9zX2FkanVzdF9wbGwoc3RydWN0IGRybV9jcnRjICpjcnRjLAog
CQkJCS8qIERWTyB3YW50cyAyeCBwaXhlbCBjbG9jayBpZiB0aGUgRFZPIGNoaXAgaXMgaW4gMTIg
Yml0IG1vZGUgKi8KIAkJCQlpZiAocmFkZW9uX2VuY29kZXItPmVuY29kZXJfaWQgPT0gRU5DT0RF
Ul9PQkpFQ1RfSURfSU5URVJOQUxfS0xEU0NQX0RWTzEpCiAJCQkJCWFkanVzdGVkX2Nsb2NrID0g
bW9kZS0+Y2xvY2sgKiAyOworCQkJCWlmIChyYWRlb25fZW5jb2Rlci0+YWN0aXZlX2RldmljZSAm
IChBVE9NX0RFVklDRV9UVl9TVVBQT1JUKSkgeworCQkJCQlwbGwtPmFsZ28gPSBQTExfQUxHT19M
RUdBQ1k7CisJCQkJCXBsbC0+ZmxhZ3MgfD0gUkFERU9OX1BMTF9QUkVGRVJfQ0xPU0VTVF9MT1dF
UjsKKwkJCQl9CiAJCQl9IGVsc2UgewogCQkJCWlmIChlbmNvZGVyLT5lbmNvZGVyX3R5cGUgIT0g
RFJNX01PREVfRU5DT0RFUl9EQUMpCiAJCQkJCXBsbC0+ZmxhZ3MgfD0gUkFERU9OX1BMTF9OT19P
RERfUE9TVF9ESVY7Ci0tIAoxLjUuNi4zCgo=
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