[PATCH] agp/intel: Fix dma mask for Sandybridge

[Takashi Iwai]

At Mon, 23 Aug 2010 08:02:42 +0200,
I wrote:
> 
> At Mon, 23 Aug 2010 13:43:03 +0800,
> Zhenyu Wang wrote:
> > 
> > On 2010.08.23 07:29:29 +0200, Takashi Iwai wrote:
> > > > Sandybridge can do 40-bit dma mask. This has been fixed upstream now.
> > > 
> > > Could you point where is the upstream GIT tree and the corresponding
> > > commit id?
> > > 
> > 
> > Linus's tree:
> > 
> > commit 877fdacf8291d7627f339885b5ae52c2f6061734
> > Author: Zhenyu Wang <zhenyuw at linux.intel.com>
> > Date:   Thu Aug 19 09:46:13 2010 +0800
> > 
> > agp/intel: set 40-bit dma mask on Sandybridge
> >         
> > Signed-off-by: Zhenyu Wang <zhenyuw at linux.intel.com>
> > Signed-off-by: Eric Anholt <eric at anholt.net>
> 
> Thanks.
> 
> But, isn't it better to add .dma_mask field to struct
> agp_bridge_driver?
> 
> Also, I don't understand the logic of 40bit addr calculation:
> 
> > static unsigned long intel_gen6_mask_memory(struct agp_bridge_data *bridge,
> >                                             dma_addr_t addr, int type)
> > {
> >         /* Shift high bits down */
> >        addr |= (addr >> 28) & 0xff;
> 
> Isn't it 0xff0?

Or, it's rather meant (addr >> 32) & 0xff?
If so, better to be upper_32_bits(addr) & 0xff...


thanks,

Takashi