[PATCH] Big Endian support for RV730 (Mesa r600)

Cédric Cano ccano at interfaceconcept.com
Thu Apr 14 00:33:52 PDT 2011

Le 13/04/2011 14:10, Benjamin Herrenschmidt a écrit :
> On Wed, 2011-04-13 at 22:05 +1000, Benjamin Herrenschmidt wrote:
>> On Tue, 2011-04-12 at 10:01 +0200, Cédric Cano wrote:
>>> Hi
>>> Here you are a patch that adds big endian support for rv730 in r600
>>> classic mesa driver. The BE modifications are almost the same as the DRM
>>> / DDX driver modifications
>>> (http://lists.freedesktop.org/archives/dri-devel/2011-February/008151.html).
>>> I used the mesa-demos to test the driver status on big endian platform.
>>> Nearly all demos renders the same as on Intel architecture.
>>> Nevertheless, there are still some issues in glReadPixels (r600_blit)
>>> with some formats. I can't figure out exactly what and when data must be
>>> swapped (set_tex_resoures, set_render_target...). Review of the patch
>>> would be greatly appreciated.
>>> It seems that r600g will be the default for Mesa 7.11 so I'll try to
>>> enable big endian support for Gallium now.
>> Cool stuff !
>> I'll try to test that one of these days on various ppc's
> BTW. I see you used some FSL embedded board. Do you have your PCIe MMIO
> space above 32-bit ? Last I looked, there was a bunch of fixing needing
> to be done, among others in the TTM, to make that work.
> I had some preliminary patches but they bitrot... mostly the issue is to
> make sure than a phys_addr_t is used instead of an unsigned long
> whenever it tries to store the physical address of an object.
> Ben.
Hi Ben,

I don't use Freescale eval boards but our custom PowerPC design. We 
didn't enable the 36-bit addressing mode yet.


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