Information resources

Alex Deucher alexdeucher at gmail.com
Fri Feb 25 15:19:23 PST 2011


On Fri, Feb 25, 2011 at 6:09 PM, Phillip Susi <psusi at cfl.rr.com> wrote:
> On 02/25/2011 03:56 PM, Dave Airlie wrote:
>>
>> So you made an assumpution you knew how graphics cards worked and
>> derived a theory, unfortunately the assumption was wrong.
>
> How so?  After studying the R600 documentation I found, it sounds like
> whatever microcode is in that firmware image is constantly running, trying
> to process input from the ring buffer.  Perhaps you could point me to more
> documentation to read, as the one I found seemed to be geared more towards
> GPGPU programming.

The CP only starts fetching and processing commands when the read and
write pointers are different.  Once they are the same, the CP stops
executing.  See Chapter 5 of this doc:
http://www.x.org/docs/AMD/R5xx_Acceleration_v1.5.pdf
It's for r5xx hardware, but the CP works the same way on all radeons.

>
>> a GPU doing nothing still runs at a high clock speed, clocking the
>> memory bus for the video RAM at full tilt. We don't have reliably
>> dynamic power management yet so at the moment manual clock switching is
>> all we have.
>
> If it were actually doing nothing ( as opposed to busy waiting ), then it
> wouldn't be hammering the memory bus full tilt.

The memory clock is still running at whatever clock it's set to unless
you manually change it.  Things are like displays are constantly being
fed from vram.

>
>> Even if the CP was running in a tight loop it consumes no power compared
>> to the memory interfaces.
>
> How so?  The memory interface feeds requested data to the CP, so if it isn't
> running...
>
>> Yes and no. AMD supplied firmware from their driver with the interfaces
>> documented like they have done since r100. You could write your own
>> microcode after you RE and write an assembler for the CP core, but so
>> far nobody has done this and we have a lot of other areas to improve
>> before most of the developers would care.
>
> Could you point me to this documentation?

See chapter 6 of this doc for pre6xx asics:
http://www.x.org/docs/AMD/R5xx_Acceleration_v1.5.pdf
and this chapter 5 of this doc for 6xx+ asics:
http://www.x.org/docs/AMD/R6xx_R7xx_3D.pdf

Alex

>
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