[PATCH] drm/radeon/kms: fix typo in read_disabled vbios code

[Alex Deucher]

Ignore this.  new version on the way.

On Mon, Jul 11, 2011 at 3:45 PM, Alex Deucher <alexdeucher at gmail.com> wrote:
> Rom bit changed between pre-PCIE and PCIE asics.
>
> Signed-off-by: Alex Deucher <alexdeucher at gmail.com>
> ---
>  drivers/gpu/drm/radeon/radeon_bios.c |    7 +++++--
>  drivers/gpu/drm/radeon/radeon_reg.h  |    3 ++-
>  2 files changed, 7 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/radeon_bios.c b/drivers/gpu/drm/radeon/radeon_bios.c
> index 3fc5fa1..c2dcca5 100644
> --- a/drivers/gpu/drm/radeon/radeon_bios.c
> +++ b/drivers/gpu/drm/radeon/radeon_bios.c
> @@ -350,7 +350,7 @@ static bool avivo_read_disabled_bios(struct radeon_device *rdev)
>        WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
>
>        /* enable the rom */
> -       WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));
> +       WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RV370_BUS_BIOS_DIS_ROM));
>
>        /* Disable VGA mode */
>        WREG32(AVIVO_D1VGA_CONTROL,
> @@ -412,7 +412,10 @@ static bool legacy_read_disabled_bios(struct radeon_device *rdev)
>        WREG32(RADEON_VIPH_CONTROL, (viph_control & ~RADEON_VIPH_EN));
>
>        /* enable the rom */
> -       WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));
> +       if (rdev->flags & RADEON_IS_PCIE)
> +               WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RV370_BUS_BIOS_DIS_ROM));
> +       else
> +               WREG32(RADEON_BUS_CNTL, (bus_cntl & ~RADEON_BUS_BIOS_DIS_ROM));
>
>        /* Turn off mem requests and CRTC for both controllers */
>        WREG32(RADEON_CRTC_GEN_CNTL,
> diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h
> index ec93a75..115fa67 100644
> --- a/drivers/gpu/drm/radeon/radeon_reg.h
> +++ b/drivers/gpu/drm/radeon/radeon_reg.h
> @@ -289,8 +289,9 @@
>  #define RADEON_BRUSH_SCALE                  0x1470
>  #define RADEON_BRUSH_Y_X                    0x1474
>  #define RADEON_BUS_CNTL                     0x0030
> +#       define RV370_BUS_BIOS_DIS_ROM        (1 << 2) /* pcie chips */
>  #       define RADEON_BUS_MASTER_DIS         (1 << 6)
> -#       define RADEON_BUS_BIOS_DIS_ROM       (1 << 12)
> +#       define RADEON_BUS_BIOS_DIS_ROM       (1 << 12) /* non-pcie chips, r1xx, r2xx, r300, r350, rv350, r420 */
>  #      define RS600_BUS_MASTER_DIS          (1 << 14)
>  #      define RS600_MSI_REARM               (1 << 20) /* rs600/rs690/rs740 */
>  #       define RADEON_BUS_RD_DISCARD_EN      (1 << 24)
> --
> 1.7.1.1
>
>