[Bug 27314] displayport link training fails on certain panels (channel equalization fails)

bugzilla-daemon at freedesktop.org bugzilla-daemon at freedesktop.org
Wed Mar 23 09:46:22 PDT 2011


--- Comment #36 from Alex Deucher <agd5f at yahoo.com> 2011-03-23 09:46:22 PDT ---
(In reply to comment #35)
> Just out of curiosity, why is link training implemented on driver level and not
> on drm level? I see that nouvau and radeon each have their own implementation.
> The algorithm does not depend on the card, right? Only the way voltage,
> patterns etc are set does. Maybe by merging them the problem can be found.

The link training algo is the same across all chips in theory (it's defined in
a VESA spec).  However, there are often a lot of asic specific things that need
to be handled.  It would probably be doable if you could figure out the right
set of callbacks and driver adjustable fields to make all the drivers happy.

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