[PATCH] drm/radeon: fix cayman struct accessors.

[Alex Deucher]

On Mon, May 9, 2011 at 1:02 AM, Dave Airlie <airlied at gmail.com> wrote:
> From: Dave Airlie <airlied at redhat.com>
>
> We are accessing totally the wrong struct in this case, and putting
> uninitialised values into the GPU, which it doesn't like unsurprisingly.
>
> Signed-off-by: Dave Airlie <airlied at redhat.com>

Reviewed-by: Alex Deucher <alexdeucher at gmail.com>


> ---
>  drivers/gpu/drm/radeon/ni.c |   16 ++++++++--------
>  1 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
> index 7aade20..e9e45ea 100644
> --- a/drivers/gpu/drm/radeon/ni.c
> +++ b/drivers/gpu/drm/radeon/ni.c
> @@ -871,7 +871,7 @@ static void cayman_gpu_init(struct radeon_device *rdev)
>
>        smx_dc_ctl0 = RREG32(SMX_DC_CTL0);
>        smx_dc_ctl0 &= ~NUMBER_OF_SETS(0x1ff);
> -       smx_dc_ctl0 |= NUMBER_OF_SETS(rdev->config.evergreen.sx_num_of_sets);
> +       smx_dc_ctl0 |= NUMBER_OF_SETS(rdev->config.cayman.sx_num_of_sets);
>        WREG32(SMX_DC_CTL0, smx_dc_ctl0);
>
>        WREG32(SPI_CONFIG_CNTL_1, VTX_DONE_DELAY(4) | CRC_SIMD_ID_WADDR_DISABLE);
> @@ -887,20 +887,20 @@ static void cayman_gpu_init(struct radeon_device *rdev)
>
>        WREG32(TA_CNTL_AUX, DISABLE_CUBE_ANISO);
>
> -       WREG32(SX_EXPORT_BUFFER_SIZES, (COLOR_BUFFER_SIZE((rdev->config.evergreen.sx_max_export_size / 4) - 1) |
> -                                       POSITION_BUFFER_SIZE((rdev->config.evergreen.sx_max_export_pos_size / 4) - 1) |
> -                                       SMX_BUFFER_SIZE((rdev->config.evergreen.sx_max_export_smx_size / 4) - 1)));
> +       WREG32(SX_EXPORT_BUFFER_SIZES, (COLOR_BUFFER_SIZE((rdev->config.cayman.sx_max_export_size / 4) - 1) |
> +                                       POSITION_BUFFER_SIZE((rdev->config.cayman.sx_max_export_pos_size / 4) - 1) |
> +                                       SMX_BUFFER_SIZE((rdev->config.cayman.sx_max_export_smx_size / 4) - 1)));
>
> -       WREG32(PA_SC_FIFO_SIZE, (SC_PRIM_FIFO_SIZE(rdev->config.evergreen.sc_prim_fifo_size) |
> -                                SC_HIZ_TILE_FIFO_SIZE(rdev->config.evergreen.sc_hiz_tile_fifo_size) |
> -                                SC_EARLYZ_TILE_FIFO_SIZE(rdev->config.evergreen.sc_earlyz_tile_fifo_size)));
> +       WREG32(PA_SC_FIFO_SIZE, (SC_PRIM_FIFO_SIZE(rdev->config.cayman.sc_prim_fifo_size) |
> +                                SC_HIZ_TILE_FIFO_SIZE(rdev->config.cayman.sc_hiz_tile_fifo_size) |
> +                                SC_EARLYZ_TILE_FIFO_SIZE(rdev->config.cayman.sc_earlyz_tile_fifo_size)));
>
>
>        WREG32(VGT_NUM_INSTANCES, 1);
>
>        WREG32(CP_PERFMON_CNTL, 0);
>
> -       WREG32(SQ_MS_FIFO_SIZES, (CACHE_FIFO_SIZE(16 * rdev->config.evergreen.sq_num_cf_insts) |
> +       WREG32(SQ_MS_FIFO_SIZES, (CACHE_FIFO_SIZE(16 * rdev->config.cayman.sq_num_cf_insts) |
>                                  FETCH_FIFO_HIWATER(0x4) |
>                                  DONE_FIFO_HIWATER(0xe0) |
>                                  ALU_UPDATE_FIFO_HIWATER(0x8)));
> --
> 1.7.1
>
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