[Intel-gfx] [PATCH 9/9] drm/i915: Initialize PCH refclks at modeset init time

Jesse Barnes jbarnes at virtuousgeek.org
Mon Oct 3 14:12:47 PDT 2011

On Tue, 27 Sep 2011 11:11:57 -0700
Keith Packard <keithp at keithp.com> wrote:

> On Tue, 27 Sep 2011 17:56:39 +0100, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> > Ah, now I see why we moved from using the active configuration earlier. ;-)
> My evil plan is revealed!
> > Doesn't this prevent us from ever using SSC though, as virtually every
> > single PCH machine has HDMI encoders that haven't been masked out through
> > the chicken fuses or VBT?
> That wasn't my intent -- the SSC source gets modulated whenever the VBT
> table says it can, so when the panel uses the SSC source, it will get
> SSC. Did I mess something up here? Or is it just some interaction with
> the mode setting code that I didn't get right?

Assuming we're selecting the proper reference clock in the PLL
selection code anyway...

Doing it all up front seems nicer; did you get confirmation that the
"wavy VGA" bug was fixed with this series?  Overall seems like a good
improvement over our old PCH refclk code...

Jesse Barnes, Intel Open Source Technology Center

More information about the dri-devel mailing list