[PATCH 1/2] drm/radeon: allow pcie gen2 speed on NI

Ilija Hadzic ihadzic at research.bell-labs.com
Wed Oct 12 06:25:45 PDT 2011


Hi Dave,

A few weeks ago I sent the two patches that allow PCI Express interface to 
run at Gen 2 speed on NI parts. Links to the patches in the mailing list 
archive + review from Alex quoted below:

http://lists.freedesktop.org/archives/dri-devel/2011-September/014474.html
http://lists.freedesktop.org/archives/dri-devel/2011-September/014475.html

I saw some activity on drm-next and drm-core-next branches, but I have 
not seen these two patches merge yet. Just wondering if they are in the 
queue for merging or if they may have fell through the cracks?

thanks,

Ilija

On Tue, 20 Sep 2011, Alex Deucher wrote:

> On Tue, Sep 20, 2011 at 10:22 AM, Ilija Hadzic
> <ihadzic at research.bell-labs.com> wrote:
>> Enabling pcie gen2 speed was skipped for Northern Islands
>> AISCs, although it looks like it works just fine with the same
>> initialization sequence used for evergreen.
>>
>> According to Alex D. gen2 init was skipped to prevent a crash
>> that has been caused by some other bug that has been
>> fixed in the meantime; so now it should be safe to enable it.
>>
>> Signed-off-by: Ilija Hadzic <ihadzic at research.bell-labs.com>
>
> I just double checked and BTC and cayman use the same programming
> method.  Both patches:
>
> Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
>
> Thanks!
>
> Alex
>
>
>> ---
>>  drivers/gpu/drm/radeon/evergreen.c |    3 +--
>>  1 files changed, 1 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
>> index f09bace..208b59c 100644
>> --- a/drivers/gpu/drm/radeon/evergreen.c
>> +++ b/drivers/gpu/drm/radeon/evergreen.c
>> @@ -2987,8 +2987,7 @@ static int evergreen_startup(struct radeon_device *rdev)
>>        int r;
>>
>>        /* enable pcie gen2 link */
>> -       if (!ASIC_IS_DCE5(rdev))
>> -               evergreen_pcie_gen2_enable(rdev);
>> +       evergreen_pcie_gen2_enable(rdev);
>>
>>        if (ASIC_IS_DCE5(rdev)) {
>>                if (!rdev->me_fw || !rdev->pfp_fw || !rdev->rlc_fw || !rdev->mc_fw) {
>> --
>> 1.7.6
>>
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>>
>


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