[PATCH 6/9] drm/i915: Fix PCH SSC reference clock settings

Chris Wilson chris at chris-wilson.co.uk
Tue Sep 27 09:47:10 PDT 2011


On Mon, 26 Sep 2011 23:11:43 -0700, Keith Packard <keithp at keithp.com> wrote:
> The PCH refclk settings are global, so we need to look at all of the
> encoders, not just the current encoder when deciding how to configure
> it. Also, handle systems with more than one panel (any combination of
> PCH/non-PCH eDP and LVDS).

As I read it, this sets the refclk not on the active configuration, but
on all the hardware detected for the system whether enabled or not.

There are two basic changes here, the cleanup and improvement to the logic
based on what type of output is connected and the second change to
determine which outputs are active.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre


More information about the dri-devel mailing list