[Intel-gfx] [PATCH 1/4] drm/i915: handle input/output sdvo timings separately in mode_set

Jesse Barnes jbarnes at virtuousgeek.org
Tue Apr 10 09:59:51 PDT 2012

On Tue, 10 Apr 2012 18:36:49 +0200
Daniel Vetter <daniel at ffwll.ch> wrote:
> Well, neither do I have a clue about sdvo, but I think I somewhat
> self-consistent explanation for what's going on.
> Sdvo seems to have two timings, one is the output timing which will be
> sent over whatever is connected on the other side of the sdvo chip (panel,
> hdmi screen, tv), the other is the input timing which will be generated by
> the gmch pipe. It looks like sdvo is expected to scale between the two.

Correct.  And the SDVO encoder in the display engine will always run
the clock at 100MHz+ and do data stuffing if the pixel rate is lower
than that, but we need to set the right clock multiplier in that case
(which we do).

> To make things slightly more complicated, we have a bunch of special
> cases:
> - for lvds panel we always use a fixed output timing, namely
>   intel_sdvo->sdvo_lvds_fixed_mode, hence that special case.
> - sdvo has an interface to generate a preferred input timing for a given
>   output timing. This is the confusing thing that I've tried to clear up
>   with the follow-on patches.
> - a special requirement is that the input pixel clock needs to be between
>   100MHz and 200MHz (likely to keep it within the electromechanical design
>   range of PCIe). Lower pixel clocks are doubled/quadrupled.
> The thing this patch tries to fix is that the pipe needs to be explicit
> instructed to double/quadruple the pixels and needs the correspondingly
> higher pixel clock, whereas the sdvo adaptor seems to do that itself and
> needs the unadjusted pixel clock.

Yeah that sounds right based on my reading of an old spec I have.

> This patch tries to fix this mess by
> - keeping the output mode timing in the unadjusted plain mode, safe for
>   the lvds case.
> - store the input timing in the adjusted_mode with the adjusted pixel
>   clock. This way we don't need to frob around with the core crtc mode set
>   code.
> - fixup the pixelclock when constructing the sdvo dtd timing struct. This
>   is why the first part of the patch is an integral part of the series.
> - the is_tv special case can be dropped because input_dtd is equivalent to
>   adjusted_mode after these changes. Follow-up patches clear this up
>   further (by simply ripping out intel_sdvo->input_dtd because it's not
>   needed).
> Hopefully this clears things up a bit.

Yep, thanks.  Hopefully you'll get your SDVO spec access soon...

Jesse Barnes, Intel Open Source Technology Center
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