[PATCH 4/8 v7] drm/i915/intel_i2c: use WAIT cycle, not STOP

[Chris Wilson]

On Thu, 12 Apr 2012 02:16:45 +0800, Daniel Kurtz <djkurtz at chromium.org> wrote:
> On Tue, Apr 10, 2012 at 11:03 PM, Daniel Vetter <daniel at ffwll.ch> wrote:
> > - Chris Wilson suggested on irc that we should wait for HW_READY even for
> > Â zero-length writes (and also reads), currently we don't.
> 
> I don't think so.  We just need to wait for (GMBUS_SATOER |
> GMBUS_HW_WAIT_PHASE).
> Why would we wait for HW_READY, too?

Just paranoia when looking at the read/write sequences and wondering how
safe they were with 0-length read/writes. No real reason to suspect that
the code is incorrect in any way.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre