PCI resources above 4GB

Steven Newbury steve at snewbury.org.uk
Thu Apr 12 04:22:34 PDT 2012

On Thu, 12 Apr 2012, 01:57:17 BST, Yinghai Lu <yinghai at kernel.org> wrote:

> On Tue, Apr 10, 2012 at 2:19 PM, Steven Newbury <steve at snewbury.org.uk>
> wrote:
> > Another thought, normally the integrated graphics has an "AGP"
> > aperture of 256M @0xe0000000, which is detected by agpgart-intel, this
> > will need to be moved up above 4G to free up 0xe0000000 for the
> > radeon, assuming the "agp_bridge" has a 64bit base register...  I
> > noticed in my docked dmesg, "AGP aperture is 256M @ 0x20000000", but
> > the PCI base: "120000000-12fffffff : 0000:00:02.0" so only 32bits have
> > been set in agpgart-intel.  Explains why i915 wasn't initialised.
> Attached patch should fix that high 32bit missing problem.

Thanks, that fixed it! :) I had a similar patch I've been working on but I had my fix in the wrong place!

In the working case, initially the BIOS has set GMA to within the low system DRAM 0xC0000000 obviously invalid.  This conflict is detected and it's relallocated to 0x12000000.

I've attempted to modify probe.c to disable 64-bit BARs not allocated above 4G so they get reallocated above when possible later.  It seemed to work, but again broke GMA despite the BAR originally containing an invalid address as mentioned above, it seems for some reason something is different when the conflict is detected and rellocated, compared to disabling it early then allocating a valid value..?

It would be useful to preserve as much low PCI memory address space as possible for hotplug devices (like my Radeon), but the other problem is small regions get allocated at the bottom, resulting in the inability to find large aligned regions later on.  I see code to default to top-down allocation was reverted, I guess I'm going to have to dig into the archive to find out why...

Thanks for all your help so far, I've been learning a lot over the last few days.

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