[PATCH] drm/radeon: update ib_execute for SI

[Alex Deucher]

On Tue, Jul 17, 2012 at 5:59 AM, Christian König
<deathsimple at vodafone.de> wrote:
> On 16.07.2012 23:14, alexdeucher at gmail.com wrote:
>>
>> From: Alex Deucher <alexander.deucher at amd.com>
>>
>> When submitting a CONST_IB, emit a SWITCH_BUFFER
>> packet before the CONST_IB.  This isn't strictly necessary
>> (the driver will work fine without it), but is good practice
>> and allows for more flexible DE/CE sychronization options
>> in the future.  Current userspace drivers do not take
>> advantage of the CE yet.
>>
>> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
>> ---
>>   drivers/gpu/drm/radeon/si.c  |    6 ++++++
>>   drivers/gpu/drm/radeon/sid.h |    1 +
>>   2 files changed, 7 insertions(+), 0 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
>> index 53e313b..191a3cd 100644
>> --- a/drivers/gpu/drm/radeon/si.c
>> +++ b/drivers/gpu/drm/radeon/si.c
>> @@ -1778,6 +1778,12 @@ void si_ring_ib_execute(struct radeon_device *rdev,
>> struct radeon_ib *ib)
>>         else
>>                 header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);
>>   +     if (ib->is_const_ib) {
>> +               /* set switch buffer packet before const IB */
>> +               radeon_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER,
>> 0));
>> +               radeon_ring_write(ring, 0);
>> +       }
>> +
>
> Additional to that I don't think the read cache flush and rptr saving is
> appropriate for a const IB, but on the other side I don't claim that I have
> understood the CE/DE separation fully yet.

Yeah, we could probably skip them for the const ib.

Alex

>
> Christian.
>
>
>>         radeon_ring_write(ring, header);
>>         radeon_ring_write(ring,
>>   #ifdef __BIG_ENDIAN
>> diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h
>> index db40679..7869089 100644
>> --- a/drivers/gpu/drm/radeon/sid.h
>> +++ b/drivers/gpu/drm/radeon/sid.h
>> @@ -901,5 +901,6 @@
>>   #define       PACKET3_WAIT_ON_DE_COUNTER_DIFF                 0x88
>>   #define       PACKET3_SET_CE_DE_COUNTERS                      0x89
>>   #define       PACKET3_WAIT_ON_AVAIL_BUFFER                    0x8A
>> +#define        PACKET3_SWITCH_BUFFER                           0x8B
>>     #endif
>
>
>