Massive power regression going 3.4->3.5

James Bottomley James.Bottomley at HansenPartnership.com
Tue Jul 31 02:37:35 PDT 2012


On Tue, 2012-07-31 at 09:28 +0100, Chris Wilson wrote:
> On Tue, 31 Jul 2012 09:06:42 +0100, James Bottomley <James.Bottomley at HansenPartnership.com> wrote:
> > Actually, bad news: it looks like the problem is drm:
> > 
> > on 3.5 killing X causes idle power to go 14W -> 5.9W
> > on 3.4.6 killing X causes idle power to go 6.8W -> 5.7W
> 
> The files that will be the most interesting to compare at first are:
> 
> /sys/kernel/debug/dri/0/i915_drpc_info
> /sys/kernel/debug/dri/0/i915_cur_delayinfo
> /sys/kernel/debug/dri/0/i915_fbc_status

This is for the good kernel 3.4.6

jejb at dabdike> cat /sys/kernel/debug/dri/0/i915_drpc_info
RC information accurate: yes
Video Turbo Mode: yes
HW control enabled: yes
SW control enabled: no
RC1e Enabled: no
RC6 Enabled: yes
Deep RC6 Enabled: no
Deepest RC6 Enabled: no
Current RC state: RC6
Core Power Down: no
jejb at dabdike> cat /sys/kernel/debug/dri/0/i915_cur_delayinfo
GT_PERF_STATUS: 0x00000d29
RPSTAT1: 0x00040d00
Render p-state ratio: 13
Render p-state VID: 41
Render p-state limit: 255
CAGF: 650MHz
RP CUR UP EI: 20459us
RP CUR UP: 172us
RP PREV UP: 0us
RP CUR DOWN EI: 0us
RP CUR DOWN: 0us
RP PREV DOWN: 0us
Lowest (RPN) frequency: 650MHz
Nominal (RP1) frequency: 650MHz
Max non-overclocked (RP0) frequency: 1100MHz
jejb at dabdike> cat /sys/kernel/debug/dri/0/i915_fbc_status
FBC disabled: disabled per module param (default off)

And the bad kernel 3.5

jejb at dabdike> cat /sys/kernel/debug/dri/0/i915_drpc_info
RC information accurate: yes
Video Turbo Mode: yes
HW control enabled: yes
SW control enabled: no
RC1e Enabled: no
RC6 Enabled: yes
Deep RC6 Enabled: no
Deepest RC6 Enabled: no
Current RC state: RC6
Core Power Down: no
RC6 "Locked to RPn" residency since boot: 0
RC6 residency since boot: 97671911
RC6+ residency since boot: 0
RC6++ residency since boot: 0
jejb at dabdike> cat /sys/kernel/debug/dri/0/i915_cur_delayinfo
GT_PERF_STATUS: 0x00000d29
RPSTAT1: 0x00048d00
Render p-state ratio: 13
Render p-state VID: 41
Render p-state limit: 255
CAGF: 650MHz
RP CUR UP EI: 63719us
RP CUR UP: 26us
RP PREV UP: 0us
RP CUR DOWN EI: 0us
RP CUR DOWN: 0us
RP PREV DOWN: 0us
Lowest (RPN) frequency: 650MHz
Nominal (RP1) frequency: 650MHz
Max non-overclocked (RP0) frequency: 1100MHz
jejb at dabdike> cat /sys/kernel/debug/dri/0/i915_fbc_status
FBC disabled: disabled per module param (default off)


> However if it was simple regression in drm, then the bisect would have
> continued to work despite the merge point jumping between 3.4 and 3.5,
> right?

No ... the bisect stepped back into 3.3 which mean I lost the ability to
detect the regression.  I think it might be fixable given I have a more
precise identifier for the tree because it looks like none of the roots
of the drm tree is before 3.4-rc.

James




More information about the dri-devel mailing list