[PATCH] drm/radeon: improve GPU lockup debugging info on r6xx/r7xx/r8xx/r9xx
Alex Deucher
alexdeucher at gmail.com
Wed Jun 27 11:15:20 PDT 2012
On Wed, Jun 27, 2012 at 12:25 PM, <j.glisse at gmail.com> wrote:
> From: Jerome Glisse <jglisse at redhat.com>
>
> Print various CP register that have valuable informations regarding
> GPU lockup.
>
> Signed-off-by: Jerome Glisse <jglisse at redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/radeon/evergreen.c | 16 ++++++++++++++++
> drivers/gpu/drm/radeon/evergreend.h | 4 ++++
> drivers/gpu/drm/radeon/ni.c | 16 ++++++++++++++++
> drivers/gpu/drm/radeon/nid.h | 4 ++++
> drivers/gpu/drm/radeon/r600.c | 16 ++++++++++++++++
> drivers/gpu/drm/radeon/r600d.h | 3 +++
> 6 files changed, 59 insertions(+)
>
> diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
> index 7fb3d2e..c3073f7 100644
> --- a/drivers/gpu/drm/radeon/evergreen.c
> +++ b/drivers/gpu/drm/radeon/evergreen.c
> @@ -2188,6 +2188,14 @@ static int evergreen_gpu_soft_reset(struct radeon_device *rdev)
> RREG32(GRBM_STATUS_SE1));
> dev_info(rdev->dev, " SRBM_STATUS=0x%08X\n",
> RREG32(SRBM_STATUS));
> + dev_info(rdev->dev, " R_008674_CP_STALLED_STAT1 = 0x%08X\n",
> + RREG32(CP_STALLED_STAT1));
> + dev_info(rdev->dev, " R_008678_CP_STALLED_STAT2 = 0x%08X\n",
> + RREG32(CP_STALLED_STAT2));
> + dev_info(rdev->dev, " R_00867C_CP_BUSY_STAT = 0x%08X\n",
> + RREG32(CP_BUSY_STAT));
> + dev_info(rdev->dev, " R_008680_CP_STAT = 0x%08X\n",
> + RREG32(CP_STAT));
> evergreen_mc_stop(rdev, &save);
> if (evergreen_mc_wait_for_idle(rdev)) {
> dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
> @@ -2225,6 +2233,14 @@ static int evergreen_gpu_soft_reset(struct radeon_device *rdev)
> RREG32(GRBM_STATUS_SE1));
> dev_info(rdev->dev, " SRBM_STATUS=0x%08X\n",
> RREG32(SRBM_STATUS));
> + dev_info(rdev->dev, " R_008674_CP_STALLED_STAT1 = 0x%08X\n",
> + RREG32(CP_STALLED_STAT1));
> + dev_info(rdev->dev, " R_008678_CP_STALLED_STAT2 = 0x%08X\n",
> + RREG32(CP_STALLED_STAT2));
> + dev_info(rdev->dev, " R_00867C_CP_BUSY_STAT = 0x%08X\n",
> + RREG32(CP_BUSY_STAT));
> + dev_info(rdev->dev, " R_008680_CP_STAT = 0x%08X\n",
> + RREG32(CP_STAT));
> evergreen_mc_resume(rdev, &save);
> return 0;
> }
> diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
> index b50b15c..d3bd098 100644
> --- a/drivers/gpu/drm/radeon/evergreend.h
> +++ b/drivers/gpu/drm/radeon/evergreend.h
> @@ -88,6 +88,10 @@
> #define CONFIG_MEMSIZE 0x5428
>
> #define CP_COHER_BASE 0x85F8
> +#define CP_STALLED_STAT1 0x8674
> +#define CP_STALLED_STAT2 0x8678
> +#define CP_BUSY_STAT 0x867C
> +#define CP_STAT 0x8680
> #define CP_ME_CNTL 0x86D8
> #define CP_ME_HALT (1 << 28)
> #define CP_PFP_HALT (1 << 26)
> diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
> index b7bf18e..dc2e34d 100644
> --- a/drivers/gpu/drm/radeon/ni.c
> +++ b/drivers/gpu/drm/radeon/ni.c
> @@ -1132,6 +1132,14 @@ static int cayman_gpu_soft_reset(struct radeon_device *rdev)
> RREG32(GRBM_STATUS_SE1));
> dev_info(rdev->dev, " SRBM_STATUS=0x%08X\n",
> RREG32(SRBM_STATUS));
> + dev_info(rdev->dev, " R_008674_CP_STALLED_STAT1 = 0x%08X\n",
> + RREG32(CP_STALLED_STAT1));
> + dev_info(rdev->dev, " R_008678_CP_STALLED_STAT2 = 0x%08X\n",
> + RREG32(CP_STALLED_STAT2));
> + dev_info(rdev->dev, " R_00867C_CP_BUSY_STAT = 0x%08X\n",
> + RREG32(CP_BUSY_STAT));
> + dev_info(rdev->dev, " R_008680_CP_STAT = 0x%08X\n",
> + RREG32(CP_STAT));
> dev_info(rdev->dev, " VM_CONTEXT0_PROTECTION_FAULT_ADDR 0x%08X\n",
> RREG32(0x14F8));
> dev_info(rdev->dev, " VM_CONTEXT0_PROTECTION_FAULT_STATUS 0x%08X\n",
> @@ -1180,6 +1188,14 @@ static int cayman_gpu_soft_reset(struct radeon_device *rdev)
> RREG32(GRBM_STATUS_SE1));
> dev_info(rdev->dev, " SRBM_STATUS=0x%08X\n",
> RREG32(SRBM_STATUS));
> + dev_info(rdev->dev, " R_008674_CP_STALLED_STAT1 = 0x%08X\n",
> + RREG32(CP_STALLED_STAT1));
> + dev_info(rdev->dev, " R_008678_CP_STALLED_STAT2 = 0x%08X\n",
> + RREG32(CP_STALLED_STAT2));
> + dev_info(rdev->dev, " R_00867C_CP_BUSY_STAT = 0x%08X\n",
> + RREG32(CP_BUSY_STAT));
> + dev_info(rdev->dev, " R_008680_CP_STAT = 0x%08X\n",
> + RREG32(CP_STAT));
> evergreen_mc_resume(rdev, &save);
> return 0;
> }
> diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h
> index a0b9806..870db34 100644
> --- a/drivers/gpu/drm/radeon/nid.h
> +++ b/drivers/gpu/drm/radeon/nid.h
> @@ -236,6 +236,10 @@
> #define CP_SEM_WAIT_TIMER 0x85BC
> #define CP_SEM_INCOMPLETE_TIMER_CNTL 0x85C8
> #define CP_COHER_CNTL2 0x85E8
> +#define CP_STALLED_STAT1 0x8674
> +#define CP_STALLED_STAT2 0x8678
> +#define CP_BUSY_STAT 0x867C
> +#define CP_STAT 0x8680
> #define CP_ME_CNTL 0x86D8
> #define CP_ME_HALT (1 << 28)
> #define CP_PFP_HALT (1 << 26)
> diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
> index bff6272..bb1958d 100644
> --- a/drivers/gpu/drm/radeon/r600.c
> +++ b/drivers/gpu/drm/radeon/r600.c
> @@ -1306,6 +1306,14 @@ int r600_gpu_soft_reset(struct radeon_device *rdev)
> RREG32(R_008014_GRBM_STATUS2));
> dev_info(rdev->dev, " R_000E50_SRBM_STATUS=0x%08X\n",
> RREG32(R_000E50_SRBM_STATUS));
> + dev_info(rdev->dev, " R_008674_CP_STALLED_STAT1 = 0x%08X\n",
> + RREG32(CP_STALLED_STAT1));
> + dev_info(rdev->dev, " R_008678_CP_STALLED_STAT2 = 0x%08X\n",
> + RREG32(CP_STALLED_STAT2));
> + dev_info(rdev->dev, " R_00867C_CP_BUSY_STAT = 0x%08X\n",
> + RREG32(CP_BUSY_STAT));
> + dev_info(rdev->dev, " R_008680_CP_STAT = 0x%08X\n",
> + RREG32(CP_STAT));
> rv515_mc_stop(rdev, &save);
> if (r600_mc_wait_for_idle(rdev)) {
> dev_warn(rdev->dev, "Wait for MC idle timedout !\n");
> @@ -1349,6 +1357,14 @@ int r600_gpu_soft_reset(struct radeon_device *rdev)
> RREG32(R_008014_GRBM_STATUS2));
> dev_info(rdev->dev, " R_000E50_SRBM_STATUS=0x%08X\n",
> RREG32(R_000E50_SRBM_STATUS));
> + dev_info(rdev->dev, " R_008674_CP_STALLED_STAT1 = 0x%08X\n",
> + RREG32(CP_STALLED_STAT1));
> + dev_info(rdev->dev, " R_008678_CP_STALLED_STAT2 = 0x%08X\n",
> + RREG32(CP_STALLED_STAT2));
> + dev_info(rdev->dev, " R_00867C_CP_BUSY_STAT = 0x%08X\n",
> + RREG32(CP_BUSY_STAT));
> + dev_info(rdev->dev, " R_008680_CP_STAT = 0x%08X\n",
> + RREG32(CP_STAT));
> rv515_mc_resume(rdev, &save);
> return 0;
> }
> diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
> index 025fd5b..4b116ae 100644
> --- a/drivers/gpu/drm/radeon/r600d.h
> +++ b/drivers/gpu/drm/radeon/r600d.h
> @@ -153,6 +153,9 @@
>
> #define CONFIG_MEMSIZE 0x5428
> #define CONFIG_CNTL 0x5424
> +#define CP_STALLED_STAT1 0x8674
> +#define CP_STALLED_STAT2 0x8678
> +#define CP_BUSY_STAT 0x867C
> #define CP_STAT 0x8680
> #define CP_COHER_BASE 0x85F8
> #define CP_DEBUG 0xC1FC
> --
> 1.7.10.2
>
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