[PATCH 02/11 v3] drm/i915/intel_i2c: assign HDMI port D to pin pair 6

[Daniel Vetter]

On Mon, Mar 26, 2012 at 10:26:41PM +0800, Daniel Kurtz wrote:
> According to i915 documentation [1], "Port D" (DP/HDMI Port D) is
> actually gmbus pin pair 6 (gmbus0.2:0 == 110b GPIOF), not 7 (111b).
> Pin pair 7 is a reserved pair.
> 
> [1] Documentation for [DevSNB+] and [DevIBX], as found on
> http://intellinuxgraphics.org
> 
> Note: the "reserved" and "disabled" pairs do not actually map to a
> physical pair of pins, nor GPIO regs and shouldn't be initialized or used.
> Fixing this is left for a later patch.
> 
> This bug has not been noticed for two reasons:
>  1) "gmbus" mode is currently disabled - all transfers are actually using
>     "bit-bang" mode which uses the GPIO port 5 (the "HDMI/DPD CTLDATA/CLK"
>     pair), at register 0x5024 (defined as GPIOF i915_reg.h).
>     Since this is the correct pair of pins for HDMI1, transfers succeed.

... this is no longer true on drm-intel-next.

>  2) Even if gmbus mode is re-enabled, the first attempted transaction
>     will fail because it tries to use the wrong ("Reserved") pin pair.
>     However, the driver immediately falls back again to the bit-bang
>     method, which correctly uses GPIOF, so again, transfers succeed.
> 
> However, if gmbus mode is re-enabled and the GPIO fall-back mode is
> disabled, then reading an attached monitor's EDID fail.
> 
> Signed-off-by: Daniel Kurtz <djkurtz at chromium.org>

Otherwise this looks ok to me - I've checked with gen3 Bspec and we seem
to indeed have a 1:1 mapping, see "Display Registers", 1.5.3 "GPIO Control
Registers", the list right below the heading.

Reviewed-by: Daniel Vetter <daniel.vetter at ffwll.ch>

When resending, can you please add the Bspec reference above?

Thanks, Daniel

> ---
>  drivers/gpu/drm/i915/i915_reg.h  |    6 +++---
>  drivers/gpu/drm/i915/intel_i2c.c |    4 ++--
>  2 files changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index f3609f2..accd8ee 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -742,9 +742,9 @@
>  #define   GMBUS_PORT_PANEL	3
>  #define   GMBUS_PORT_DPC	4 /* HDMIC */
>  #define   GMBUS_PORT_DPB	5 /* SDVO, HDMIB */
> -				  /* 6 reserved */
> -#define   GMBUS_PORT_DPD	7 /* HDMID */
> -#define   GMBUS_NUM_PORTS       8
> +#define   GMBUS_PORT_DPD	6 /* HDMID */
> +#define   GMBUS_PORT_RESERVED	7 /* 7 reserved */
> +#define   GMBUS_NUM_PORTS	8
>  #define GMBUS1			0x5104 /* command/status */
>  #define   GMBUS_SW_CLR_INT	(1<<31)
>  #define   GMBUS_SW_RDY		(1<<30)
> diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
> index 86b1861..54f85a1 100644
> --- a/drivers/gpu/drm/i915/intel_i2c.c
> +++ b/drivers/gpu/drm/i915/intel_i2c.c
> @@ -148,8 +148,8 @@ intel_gpio_setup(struct intel_gmbus *bus, u32 pin)
>  		GPIOC,
>  		GPIOD,
>  		GPIOE,
> -		0,
>  		GPIOF,
> +		0,
>  	};
>  	struct i2c_algo_bit_data *algo;
>  
> @@ -359,8 +359,8 @@ int intel_setup_gmbus(struct drm_device *dev)
>  		"panel",
>  		"dpc",
>  		"dpb",
> -		"reserved",
>  		"dpd",
> +		"reserved",
>  	};
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  	int ret, i;
> -- 
> 1.7.7.3
> 

-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48