[pull] drm-intel-fixes

Daniel Vetter daniel at ffwll.ch
Mon Sep 10 12:34:36 PDT 2012


On Mon, Sep 10, 2012 at 09:28:17AM +0200, Daniel Vetter wrote:
> Hi Dave,
> 
> You're pull just reminded me that I've been sitting on a few small -fixes,
> too. Nothing really major at all:
> - fixup edp setup sequence (Dave)
> - disable sdvo hotplug for real, this is a fixup for a messed-up
>   regression fixer (Jani)
> - don't expose dysfunctional backlight driver (Jani)
> - properly init spinlock (only used by hsw/vlv code) from Alexander
>   Shishkin

Added one more:
- fix a regression in the gen3 pageflip complete irq handling after resume
  (only affects some configurations, we've forgotten to restore a reg
  value).

Cheers, Daniel

The following changes since commit 4cbe5a555fa58a79b6ecbb6c531b8bab0650778d:

  Linux 3.6-rc4 (2012-09-01 10:39:58 -0700)

are available in the git repository at:

  git://people.freedesktop.org/~danvet/drm-intel drm-intel-fixes

for you to fetch changes up to 974a3b0f9f05b748fe11f1afc31efc32aa5160cb:

  drm/i915: set the right gen3 flip_done mode also at resume (2012-09-10 21:30:03 +0200)

----------------------------------------------------------------
Alexander Shishkin (1):
      drm/i915: initialize dpio_lock spin lock

Daniel Vetter (1):
      drm/i915: set the right gen3 flip_done mode also at resume

Dave Airlie (1):
      drm/i915/edp: get the panel delay before powering up

Jani Nikula (2):
      drm/i915: only enable sdvo hotplug irq if needed
      drm/i915: do not expose a dysfunctional backlight interface to userspace

 drivers/gpu/drm/i915/i915_dma.c    |    1 +
 drivers/gpu/drm/i915/i915_irq.c    |    3 ---
 drivers/gpu/drm/i915/intel_dp.c    |   11 +++++++----
 drivers/gpu/drm/i915/intel_panel.c |   31 ++++++++++++++++++++++---------
 drivers/gpu/drm/i915/intel_pm.c    |    3 +++
 drivers/gpu/drm/i915/intel_sdvo.c  |   15 ++++++---------
 6 files changed, 39 insertions(+), 25 deletions(-)
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch


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