[Intel-gfx] [PATCH 3/4] drm/i915/dp: Fetch downstream port info if needed during DPCD fetch

[Daniel Vetter]

On Thu, Sep 20, 2012 at 03:28:45PM +0300, Jani Nikula wrote:
> On Tue, 18 Sep 2012, Adam Jackson <ajax at redhat.com> wrote:
> > v2: Fix parenthesis mismatch, spotted by Jani Nikula
> >
> > Tested-by: Takashi Iwai <tiwai at suse.de>
> > Signed-off-by: Adam Jackson <ajax at redhat.com>
> > ---
> >  drivers/gpu/drm/i915/intel_dp.c |   25 ++++++++++++++++++++-----
> >  1 files changed, 20 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> > index ace757a..098119e 100644
> > --- a/drivers/gpu/drm/i915/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/intel_dp.c
> > @@ -39,6 +39,7 @@
> >  #include "drm_dp_helper.h"
> >  
> >  #define DP_RECEIVER_CAP_SIZE	0xf
> > +#define DP_MAX_DOWNSTREAM_PORTS 0xf
> 
> That should be 0x10. It doesn't matter in this series, but would be nice
> to fix it for correctness. Sorry I didn't spot this the first time
> around.
> 
> Otherwise, on the series,
> 
> Reviewed-by: Jani Nikula <jani.nikula at intel.com>

Ok, I've merged these 4 patches, with the #define fixed and a small merge
conflict resolved. Please yell if I've botched things up ...

Thanks, Daniel
> 
> 
> >  #define DP_LINK_STATUS_SIZE	6
> >  #define DP_LINK_CHECK_TIMEOUT	(10 * 1000)
> >  
> > @@ -56,6 +57,7 @@ struct intel_dp {
> >  	uint8_t link_bw;
> >  	uint8_t lane_count;
> >  	uint8_t dpcd[DP_RECEIVER_CAP_SIZE];
> > +	uint8_t downstream_ports[DP_MAX_DOWNSTREAM_PORTS];
> >  	struct i2c_adapter adapter;
> >  	struct i2c_algo_dp_aux_data algo;
> >  	bool is_pch_edp;
> > @@ -1968,12 +1970,25 @@ static bool
> >  intel_dp_get_dpcd(struct intel_dp *intel_dp)
> >  {
> >  	if (intel_dp_aux_native_read_retry(intel_dp, 0x000, intel_dp->dpcd,
> > -					   sizeof(intel_dp->dpcd)) &&
> > -	    (intel_dp->dpcd[DP_DPCD_REV] != 0)) {
> > -		return true;
> > -	}
> > +					   sizeof(intel_dp->dpcd)) == 0)
> > +		return false; /* aux transfer failed */
> >  
> > -	return false;
> > +	if (intel_dp->dpcd[DP_DPCD_REV] == 0)
> > +		return false; /* DPCD not present */
> > +
> > +	if (!(intel_dp->dpcd[DP_DOWNSTREAMPORT_PRESENT] &
> > +	      DP_DWN_STRM_PORT_PRESENT))
> > +		return true; /* native DP sink */
> > +
> > +	if (intel_dp->dpcd[DP_DPCD_REV] == 0x10)
> > +		return true; /* no per-port downstream info */
> > +
> > +	if (intel_dp_aux_native_read_retry(intel_dp, DP_DOWNSTREAM_PORT_0,
> > +					   intel_dp->downstream_ports,
> > +					   DP_MAX_DOWNSTREAM_PORTS) == 0)
> > +		return false; /* downstream port status fetch failed */
> > +
> > +	return true;
> >  }
> >  
> >  static void
> > -- 
> > 1.7.7.6
> >
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch