[PATCH 2/6] drm/radeon: remove HDMI interrupts on Evergreen

Alex Deucher alexdeucher at gmail.com
Sun Apr 14 08:49:09 PDT 2013


On Sat, Apr 13, 2013 at 7:26 PM, Rafał Miłecki <zajec5 at gmail.com> wrote:
> We need interrupts on format change for R6xx only, where hardware seems
> to be somehow bugged and requires setting audio info manually.

Can you confirm that this is actually needed on older chips?  AFAIK,
it shouldn't be required for any chips.  It's mainly for debugging.

Alex

>
> Signed-off-by: Rafał Miłecki <zajec5 at gmail.com>
> ---
>  drivers/gpu/drm/radeon/evergreen.c |  127 +-----------------------------------
>  1 file changed, 1 insertion(+), 126 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
> index 305a657..34d4347 100644
> --- a/drivers/gpu/drm/radeon/evergreen.c
> +++ b/drivers/gpu/drm/radeon/evergreen.c
> @@ -2702,7 +2702,6 @@ int evergreen_irq_set(struct radeon_device *rdev)
>         u32 hpd1, hpd2, hpd3, hpd4, hpd5, hpd6;
>         u32 grbm_int_cntl = 0;
>         u32 grph1 = 0, grph2 = 0, grph3 = 0, grph4 = 0, grph5 = 0, grph6 = 0;
> -       u32 afmt1 = 0, afmt2 = 0, afmt3 = 0, afmt4 = 0, afmt5 = 0, afmt6 = 0;
>         u32 dma_cntl, dma_cntl1 = 0;
>
>         if (!rdev->irq.installed) {
> @@ -2724,13 +2723,6 @@ int evergreen_irq_set(struct radeon_device *rdev)
>         hpd5 = RREG32(DC_HPD5_INT_CONTROL) & ~DC_HPDx_INT_EN;
>         hpd6 = RREG32(DC_HPD6_INT_CONTROL) & ~DC_HPDx_INT_EN;
>
> -       afmt1 = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET) & ~AFMT_AZ_FORMAT_WTRIG_MASK;
> -       afmt2 = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET) & ~AFMT_AZ_FORMAT_WTRIG_MASK;
> -       afmt3 = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET) & ~AFMT_AZ_FORMAT_WTRIG_MASK;
> -       afmt4 = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET) & ~AFMT_AZ_FORMAT_WTRIG_MASK;
> -       afmt5 = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET) & ~AFMT_AZ_FORMAT_WTRIG_MASK;
> -       afmt6 = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET) & ~AFMT_AZ_FORMAT_WTRIG_MASK;
> -
>         dma_cntl = RREG32(DMA_CNTL) & ~TRAP_ENABLE;
>
>         if (rdev->family >= CHIP_CAYMAN) {
> @@ -2822,30 +2814,6 @@ int evergreen_irq_set(struct radeon_device *rdev)
>                 DRM_DEBUG("evergreen_irq_set: hpd 6\n");
>                 hpd6 |= DC_HPDx_INT_EN;
>         }
> -       if (rdev->irq.afmt[0]) {
> -               DRM_DEBUG("evergreen_irq_set: hdmi 0\n");
> -               afmt1 |= AFMT_AZ_FORMAT_WTRIG_MASK;
> -       }
> -       if (rdev->irq.afmt[1]) {
> -               DRM_DEBUG("evergreen_irq_set: hdmi 1\n");
> -               afmt2 |= AFMT_AZ_FORMAT_WTRIG_MASK;
> -       }
> -       if (rdev->irq.afmt[2]) {
> -               DRM_DEBUG("evergreen_irq_set: hdmi 2\n");
> -               afmt3 |= AFMT_AZ_FORMAT_WTRIG_MASK;
> -       }
> -       if (rdev->irq.afmt[3]) {
> -               DRM_DEBUG("evergreen_irq_set: hdmi 3\n");
> -               afmt4 |= AFMT_AZ_FORMAT_WTRIG_MASK;
> -       }
> -       if (rdev->irq.afmt[4]) {
> -               DRM_DEBUG("evergreen_irq_set: hdmi 4\n");
> -               afmt5 |= AFMT_AZ_FORMAT_WTRIG_MASK;
> -       }
> -       if (rdev->irq.afmt[5]) {
> -               DRM_DEBUG("evergreen_irq_set: hdmi 5\n");
> -               afmt6 |= AFMT_AZ_FORMAT_WTRIG_MASK;
> -       }
>
>         if (rdev->family >= CHIP_CAYMAN) {
>                 cayman_cp_int_cntl_setup(rdev, 0, cp_int_cntl);
> @@ -2890,13 +2858,6 @@ int evergreen_irq_set(struct radeon_device *rdev)
>         WREG32(DC_HPD5_INT_CONTROL, hpd5);
>         WREG32(DC_HPD6_INT_CONTROL, hpd6);
>
> -       WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, afmt1);
> -       WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, afmt2);
> -       WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, afmt3);
> -       WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, afmt4);
> -       WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, afmt5);
> -       WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, afmt6);
> -
>         return 0;
>  }
>
> @@ -2921,13 +2882,6 @@ static void evergreen_irq_ack(struct radeon_device *rdev)
>                 rdev->irq.stat_regs.evergreen.d6grph_int = RREG32(GRPH_INT_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET);
>         }
>
> -       rdev->irq.stat_regs.evergreen.afmt_status1 = RREG32(AFMT_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET);
> -       rdev->irq.stat_regs.evergreen.afmt_status2 = RREG32(AFMT_STATUS + EVERGREEN_CRTC1_REGISTER_OFFSET);
> -       rdev->irq.stat_regs.evergreen.afmt_status3 = RREG32(AFMT_STATUS + EVERGREEN_CRTC2_REGISTER_OFFSET);
> -       rdev->irq.stat_regs.evergreen.afmt_status4 = RREG32(AFMT_STATUS + EVERGREEN_CRTC3_REGISTER_OFFSET);
> -       rdev->irq.stat_regs.evergreen.afmt_status5 = RREG32(AFMT_STATUS + EVERGREEN_CRTC4_REGISTER_OFFSET);
> -       rdev->irq.stat_regs.evergreen.afmt_status6 = RREG32(AFMT_STATUS + EVERGREEN_CRTC5_REGISTER_OFFSET);
> -
>         if (rdev->irq.stat_regs.evergreen.d1grph_int & GRPH_PFLIP_INT_OCCURRED)
>                 WREG32(GRPH_INT_STATUS + EVERGREEN_CRTC0_REGISTER_OFFSET, GRPH_PFLIP_INT_CLEAR);
>         if (rdev->irq.stat_regs.evergreen.d2grph_int & GRPH_PFLIP_INT_OCCURRED)
> @@ -3001,36 +2955,6 @@ static void evergreen_irq_ack(struct radeon_device *rdev)
>                 tmp |= DC_HPDx_INT_ACK;
>                 WREG32(DC_HPD6_INT_CONTROL, tmp);
>         }
> -       if (rdev->irq.stat_regs.evergreen.afmt_status1 & AFMT_AZ_FORMAT_WTRIG) {
> -               tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET);
> -               tmp |= AFMT_AZ_FORMAT_WTRIG_ACK;
> -               WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC0_REGISTER_OFFSET, tmp);
> -       }
> -       if (rdev->irq.stat_regs.evergreen.afmt_status2 & AFMT_AZ_FORMAT_WTRIG) {
> -               tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET);
> -               tmp |= AFMT_AZ_FORMAT_WTRIG_ACK;
> -               WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC1_REGISTER_OFFSET, tmp);
> -       }
> -       if (rdev->irq.stat_regs.evergreen.afmt_status3 & AFMT_AZ_FORMAT_WTRIG) {
> -               tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET);
> -               tmp |= AFMT_AZ_FORMAT_WTRIG_ACK;
> -               WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC2_REGISTER_OFFSET, tmp);
> -       }
> -       if (rdev->irq.stat_regs.evergreen.afmt_status4 & AFMT_AZ_FORMAT_WTRIG) {
> -               tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET);
> -               tmp |= AFMT_AZ_FORMAT_WTRIG_ACK;
> -               WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC3_REGISTER_OFFSET, tmp);
> -       }
> -       if (rdev->irq.stat_regs.evergreen.afmt_status5 & AFMT_AZ_FORMAT_WTRIG) {
> -               tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET);
> -               tmp |= AFMT_AZ_FORMAT_WTRIG_ACK;
> -               WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, tmp);
> -       }
> -       if (rdev->irq.stat_regs.evergreen.afmt_status6 & AFMT_AZ_FORMAT_WTRIG) {
> -               tmp = RREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET);
> -               tmp |= AFMT_AZ_FORMAT_WTRIG_ACK;
> -               WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, tmp);
> -       }
>  }
>
>  static void evergreen_irq_disable(struct radeon_device *rdev)
> @@ -3079,7 +3003,6 @@ int evergreen_irq_process(struct radeon_device *rdev)
>         u32 src_id, src_data;
>         u32 ring_index;
>         bool queue_hotplug = false;
> -       bool queue_hdmi = false;
>
>         if (!rdev->ih.enabled || rdev->shutdown)
>                 return IRQ_NONE;
> @@ -3313,53 +3236,7 @@ restart_ih:
>                         }
>                         break;
>                 case 44: /* hdmi */
> -                       switch (src_data) {
> -                       case 0:
> -                               if (rdev->irq.stat_regs.evergreen.afmt_status1 & AFMT_AZ_FORMAT_WTRIG) {
> -                                       rdev->irq.stat_regs.evergreen.afmt_status1 &= ~AFMT_AZ_FORMAT_WTRIG;
> -                                       queue_hdmi = true;
> -                                       DRM_DEBUG("IH: HDMI0\n");
> -                               }
> -                               break;
> -                       case 1:
> -                               if (rdev->irq.stat_regs.evergreen.afmt_status2 & AFMT_AZ_FORMAT_WTRIG) {
> -                                       rdev->irq.stat_regs.evergreen.afmt_status2 &= ~AFMT_AZ_FORMAT_WTRIG;
> -                                       queue_hdmi = true;
> -                                       DRM_DEBUG("IH: HDMI1\n");
> -                               }
> -                               break;
> -                       case 2:
> -                               if (rdev->irq.stat_regs.evergreen.afmt_status3 & AFMT_AZ_FORMAT_WTRIG) {
> -                                       rdev->irq.stat_regs.evergreen.afmt_status3 &= ~AFMT_AZ_FORMAT_WTRIG;
> -                                       queue_hdmi = true;
> -                                       DRM_DEBUG("IH: HDMI2\n");
> -                               }
> -                               break;
> -                       case 3:
> -                               if (rdev->irq.stat_regs.evergreen.afmt_status4 & AFMT_AZ_FORMAT_WTRIG) {
> -                                       rdev->irq.stat_regs.evergreen.afmt_status4 &= ~AFMT_AZ_FORMAT_WTRIG;
> -                                       queue_hdmi = true;
> -                                       DRM_DEBUG("IH: HDMI3\n");
> -                               }
> -                               break;
> -                       case 4:
> -                               if (rdev->irq.stat_regs.evergreen.afmt_status5 & AFMT_AZ_FORMAT_WTRIG) {
> -                                       rdev->irq.stat_regs.evergreen.afmt_status5 &= ~AFMT_AZ_FORMAT_WTRIG;
> -                                       queue_hdmi = true;
> -                                       DRM_DEBUG("IH: HDMI4\n");
> -                               }
> -                               break;
> -                       case 5:
> -                               if (rdev->irq.stat_regs.evergreen.afmt_status6 & AFMT_AZ_FORMAT_WTRIG) {
> -                                       rdev->irq.stat_regs.evergreen.afmt_status6 &= ~AFMT_AZ_FORMAT_WTRIG;
> -                                       queue_hdmi = true;
> -                                       DRM_DEBUG("IH: HDMI5\n");
> -                               }
> -                               break;
> -                       default:
> -                               DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data);
> -                               break;
> -                       }
> +                       DRM_ERROR("Unhandled HDMI interrupt: %d %d\n", src_id, src_data);
>                         break;
>                 case 146:
>                 case 147:
> @@ -3418,8 +3295,6 @@ restart_ih:
>         }
>         if (queue_hotplug)
>                 schedule_work(&rdev->hotplug_work);
> -       if (queue_hdmi)
> -               schedule_work(&rdev->audio_work);
>         rdev->ih.rptr = rptr;
>         WREG32(IH_RB_RPTR, rdev->ih.rptr);
>         atomic_set(&rdev->ih.lock, 0);
> --
> 1.7.10.4
>


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