[PATCH 4/6] drm/msm: add a3xx gpu support

Rob Clark robdclark at gmail.com
Tue Aug 6 04:47:10 PDT 2013


On Mon, Aug 5, 2013 at 8:10 PM, Dave Airlie <airlied at gmail.com> wrote:
>> diff --git a/include/uapi/drm/msm_drm.h b/include/uapi/drm/msm_drm.h
>> new file mode 100644
>> index 0000000..a586fbd
>> --- /dev/null
>> +++ b/include/uapi/drm/msm_drm.h
>> @@ -0,0 +1,198 @@
>> +/*
>> + * Copyright (C) 2013 Red Hat
>> + * Author: Rob Clark <robdclark at gmail.com>
>> + *
>> + * This program is free software; you can redistribute it and/or modify it
>> + * under the terms of the GNU General Public License version 2 as published by
>> + * the Free Software Foundation.
>> + *
>> + * This program is distributed in the hope that it will be useful, but WITHOUT
>> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
>> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
>> + * more details.
>> + *
>> + * You should have received a copy of the GNU General Public License along with
>> + * this program.  If not, see <http://www.gnu.org/licenses/>.
>> + */
>> +
>> +#ifndef __MSM_DRM_H__
>> +#define __MSM_DRM_H__
>> +
>> +#include <stddef.h>
>> +#include <drm/drm.h>
>> +
>> +/* Please note that modifications to all structs defined here are
>> + * subject to backwards-compatibility constraints:
>> + *  1) Do not use pointers, use uint64_t instead for 32 bit / 64 bit
>> + *     user/kernel compatibility
>> + *  2) Keep fields aligned to their size
>> + *  3) Because of how drm_ioctl() works, we can add new fields at
>> + *     the end of an ioctl if some care is taken: drm_ioctl() will
>> + *     zero out the new fields at the tail of the ioctl, so a zero
>> + *     value should have a backwards compatible meaning.  And for
>> + *     output params, userspace won't see the newly added output
>> + *     fields.. so that has to be somehow ok.
>> + */
>> +
>> +#define MSM_PIPE_NONE        0x00
>> +#define MSM_PIPE_2D0         0x01
>> +#define MSM_PIPE_2D1         0x02
>> +#define MSM_PIPE_3D0         0x10
>> +
>> +#define MSM_PARAM_GPU_ID     0x01
>> +#define MSM_PARAM_GMEM_SIZE  0x02
>> +
>> +struct drm_msm_param {
>> +       uint32_t pipe;           /* in, MSM_PIPE_x */
>> +       uint32_t param;          /* in, MSM_PARAM_x */
>> +       uint64_t value;          /* out (get_param) or in (set_param) */
>> +};
>> +
>> +/*
>> + * GEM buffers:
>> + */
>> +
>> +// TODO: might eventually want some more usage hints (like RENDER_TARGET,
>> +// etc) to give some hint about initial placement (DDR, SMI, etc..)
>> +#define MSM_BO_SCANOUT       0x00000001     /* scanout capable */
>> +#define MSM_BO_GPU_READONLY  0x00000002
>> +#define MSM_BO_CACHE_MASK    0x000f0000
>> +/* cache modes */
>> +#define MSM_BO_CACHED        0x00010000
>> +#define MSM_BO_WC            0x00020000
>> +#define MSM_BO_UNCACHED      0x00040000
>> +
>> +struct drm_msm_gem_new {
>> +       uint64_t size;           /* in */
>> +       uint32_t flags;          /* in, mask of MSM_BO_x */
>> +       uint32_t handle;         /* out */
>> +};
>> +
>> +struct drm_msm_gem_info {
>> +       uint32_t handle;         /* in */
>> +       uint32_t pad;
>> +       uint64_t offset;         /* out, offset to pass to mmap() */
>> +};
>> +
>> +#define MSM_PREP_READ        0x01
>> +#define MSM_PREP_WRITE       0x02
>> +#define MSM_PREP_NOSYNC      0x04
>> +
>> +struct drm_msm_gem_cpu_prep {
>> +       uint32_t handle;         /* in */
>> +       uint32_t op;             /* in, mask of MSM_PREP_x */
>> +       struct timespec timeout; /* in, timeout (clock_monotonic abs time) */
>
> this scares me, don't do this from what I can see, and the fact I have
> to check to confirm it this ends up using a long, which changes size
> on 32/64 bit.

yeah, it does change size..   I'd seen it used in ioctls in other
drivers (for example, asound), but when I went back and looked closer,
it is all stuff w/ 32bit compat glue.  So I'll change this.

BR,
-R


> Dave.


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