[PATCH 1/3] drm/radeon: split out radeon_uvd_resume from uvd_v4_2_resume
Christian König
deathsimple at vodafone.de
Thu Aug 29 23:49:36 PDT 2013
Am 29.08.2013 23:24, schrieb Alex Deucher:
> For powergating, we just need to re-init the registers, there
> is no need to resture the uvd BOs. This just adds needless
> work when powergating uvd for playback while the system is
> on. We only need to restore the uvd BOs on an actual resume
> from suspend or when the driver loads.
>
> Signed-off-by: Alex Deucher <alexander.deucher at amd.com>
We probably should mention somewhere that this patchset fixes multiple
stream playback on Kabini, apart from that the patches are:
Reviewed-by: Christian König <christian.koenig at amd.com>
> ---
> drivers/gpu/drm/radeon/cik.c | 13 ++++++++-----
> drivers/gpu/drm/radeon/uvd_v4_2.c | 5 -----
> 2 files changed, 8 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
> index e336a31..79124f8 100644
> --- a/drivers/gpu/drm/radeon/cik.c
> +++ b/drivers/gpu/drm/radeon/cik.c
> @@ -7051,12 +7051,15 @@ static int cik_startup(struct radeon_device *rdev)
> return r;
> }
>
> - r = uvd_v4_2_resume(rdev);
> + r = radeon_uvd_resume(rdev);
> if (!r) {
> - r = radeon_fence_driver_start_ring(rdev,
> - R600_RING_TYPE_UVD_INDEX);
> - if (r)
> - dev_err(rdev->dev, "UVD fences init error (%d).\n", r);
> + r = uvd_v4_2_resume(rdev);
> + if (!r) {
> + r = radeon_fence_driver_start_ring(rdev,
> + R600_RING_TYPE_UVD_INDEX);
> + if (r)
> + dev_err(rdev->dev, "UVD fences init error (%d).\n", r);
> + }
> }
> if (r)
> rdev->ring[R600_RING_TYPE_UVD_INDEX].ring_size = 0;
> diff --git a/drivers/gpu/drm/radeon/uvd_v4_2.c b/drivers/gpu/drm/radeon/uvd_v4_2.c
> index d7e4807..d04d507 100644
> --- a/drivers/gpu/drm/radeon/uvd_v4_2.c
> +++ b/drivers/gpu/drm/radeon/uvd_v4_2.c
> @@ -39,11 +39,6 @@ int uvd_v4_2_resume(struct radeon_device *rdev)
> {
> uint64_t addr;
> uint32_t size;
> - int r;
> -
> - r = radeon_uvd_resume(rdev);
> - if (r)
> - return r;
>
> /* programm the VCPU memory controller bits 0-27 */
> addr = rdev->uvd.gpu_addr >> 3;
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