[PATCH 1/2] drm/cirrus: Correct register values for 16bpp

[Takashi Iwai]

Hi Dave,

any chance to take a look at this problem?


thanks,

Takashi

At Fri, 25 Jan 2013 17:21:54 +0100,
Takashi Iwai wrote:
> 
> When the mode is set with 16bpp on QEMU, the output gets totally
> broken.  The culprit is the bogus register values set for 16bpp,
> which was likely copied from from a wrong place.
> 
> Bugzilla: https://bugzilla.novell.com/show_bug.cgi?id=799216
> 
> Cc: <stable at vger.kernel.org>
> Signed-off-by: Takashi Iwai <tiwai at suse.de>
> ---
>  drivers/gpu/drm/cirrus/cirrus_mode.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/cirrus/cirrus_mode.c b/drivers/gpu/drm/cirrus/cirrus_mode.c
> index 60685b2..379a47e 100644
> --- a/drivers/gpu/drm/cirrus/cirrus_mode.c
> +++ b/drivers/gpu/drm/cirrus/cirrus_mode.c
> @@ -273,8 +273,8 @@ static int cirrus_crtc_mode_set(struct drm_crtc *crtc,
>  		sr07 |= 0x11;
>  		break;
>  	case 16:
> -		sr07 |= 0xc1;
> -		hdr = 0xc0;
> +		sr07 |= 0x17;
> +		hdr = 0xc1;
>  		break;
>  	case 24:
>  		sr07 |= 0x15;
> -- 
> 1.8.1.1
> 
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