Wrong vsync offset calculation in drm_edid.c
Peter Blum
Peter.Blum at lxco.com
Thu Mar 7 07:41:20 PST 2013
This patch is a bug fix for the file drm_edid.c of the kernel 3.8.
The vsync offset is calculated wrong from the EDID set because of the
wrong shift direction.
We could measure the bad old setting and also the good new setting after
the bug fix.
Signed-off-by: Peter Blum <Peter.Blum at lxco.com>
diff -Naur a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
--- a/drivers/gpu/drm/drm_edid.c 2013-02-19 00:58:34.000000000 +0100
+++ b/drivers/gpu/drm/drm_edid.c 2013-03-07 12:04:24.527609783 +0100
@@ -893,7 +893,7 @@
unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 |
pt->vblank_lo;
unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi
& 0xc0) << 2 | pt->hsync_offset_lo;
unsigned hsync_pulse_width =
(pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 |
pt->hsync_pulse_width_lo;
- unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi &
0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
+ unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi &
0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
unsigned vsync_pulse_width =
(pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 |
(pt->vsync_offset_pulse_width_lo & 0xf);
/* ignore tiny modes */
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