[PATCH 2/3] ARM: dts: arndale: Add hdmi phy settings
Shirish S
s.shirish at samsung.com
Mon Oct 28 11:39:14 CET 2013
This patch moves the hdmi phy setting to arndale dts,
as its more of a per board configuration and also
shall be easier for supporting future chipsets.
Signed-off-by: Shirish S <s.shirish at samsung.com>
---
arch/arm/boot/dts/exynos5250-arndale.dts | 68 ++++++++++++++++++++++++++++++
1 file changed, 68 insertions(+)
diff --git a/arch/arm/boot/dts/exynos5250-arndale.dts b/arch/arm/boot/dts/exynos5250-arndale.dts
index abc7272..3b33704 100644
--- a/arch/arm/boot/dts/exynos5250-arndale.dts
+++ b/arch/arm/boot/dts/exynos5250-arndale.dts
@@ -427,6 +427,74 @@
vdd_osc-supply = <&ldo10_reg>;
vdd_pll-supply = <&ldo8_reg>;
vdd-supply = <&ldo8_reg>;
+ hdmiphy-configs {
+ nr-configs = <13>;
+ config0: config0 {
+ pixel-clock = <25200000>;
+ config-de-emphasis-level = /bits/ 8 <0x26>;
+ config-clock-level = /bits/ 8 < 0x66>;
+ };
+ config1: config1 {
+ pixel-clock = <27000000>;
+ config-de-emphasis-level = /bits/ 8 <0x26>;
+ config-clock-level = /bits/ 8 < 0x66>;
+ };
+ config2: config2 {
+ pixel-clock = <27027000>;
+ config-de-emphasis-level = /bits/ 8 <0x26>;
+ config-clock-level = /bits/ 8 < 0x66>;
+ };
+ config3: config3 {
+ pixel-clock = <36000000>;
+ config-de-emphasis-level = /bits/ 8 <0x26>;
+ config-clock-level = /bits/ 8 < 0x66>;
+ };
+ config4: config4 {
+ pixel-clock = <40000000>;
+ config-de-emphasis-level = /bits/ 8 <0x26>;
+ config-clock-level = /bits/ 8 < 0x66>;
+ };
+ config5: config5 {
+ pixel-clock = <65000000>;
+ config-de-emphasis-level = /bits/ 8 <0x26>;
+ config-clock-level = /bits/ 8 < 0x66>;
+ };
+ config6: config6 {
+ pixel-clock = <74176000>;
+ config-de-emphasis-level = /bits/ 8 <0x26>;
+ config-clock-level = /bits/ 8 < 0x66>;
+ };
+ config7: config7 {
+ pixel-clock = <74250000>;
+ config-de-emphasis-level = /bits/ 8 <0x26>;
+ config-clock-level = /bits/ 8 < 0x66>;
+ };
+ config8: config8 {
+ pixel-clock = <83500000>;
+ config-de-emphasis-level = /bits/ 8 <0x26>;
+ config-clock-level = /bits/ 8 < 0x66>;
+ };
+ config9: config9 {
+ pixel-clock = <106500000>;
+ config-de-emphasis-level = /bits/ 8 <0x26>;
+ config-clock-level = /bits/ 8 < 0x66>;
+ };
+ config10: config10 {
+ pixel-clock = <108000000>;
+ config-de-emphasis-level = /bits/ 8 <0x26>;
+ config-clock-level = /bits/ 8 < 0x66>;
+ };
+ config11: config11 {
+ pixel-clock = <146250000>;
+ config-de-emphasis-level = /bits/ 8 <0x26>;
+ config-clock-level = /bits/ 8 < 0x66>;
+ };
+ config12: config12 {
+ pixel-clock = <148500000>;
+ config-de-emphasis-level = /bits/ 8 <0x26>;
+ config-clock-level = /bits/ 8 < 0x66>;
+ };
+ };
};
mmc_reg: voltage-regulator {
--
1.7.9.5
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