drm/radeon: "ring test failed" on PA-RISC Linux

[Alex Deucher]

On Tue, Sep 17, 2013 at 5:23 AM, Alex Ivanov <gnidorah at p0n4ik.tk> wrote:
> Alex,
>
> 10.09.2013, в 16:37, Alex Deucher <alexdeucher at gmail.com> написал(а):
>
>> The dummy page isn't really going to help much.  That page is just
>> used as a safety placeholder for gart entries that aren't mapped on
>> the GPU.  TTM (drivers/gpu/drm/ttm) actually does the allocation of
>> the backing pages for the gart.
>
>> You may want to look there.
>
> Ah, sorry. Indeed. Though, my idea with:
>
> On Tue, Sep 10, 2013 at 5:20 AM, Alex Ivanov <gnidorah at p0n4ik.tk> wrote:
>
>> Thanks! I'll try. Meanwhile i've tried a switch from page_alloc() to
>> dma_alloc_coherent() in radeon_dummy_page_*(), which didn't help :(
>
> doesn't make a sense at TTM part as well.

After the driver is loaded, you can dump some info from debugfs:
r100_rbbm_info
r100_cp_ring_info
r100_cp_csq_fifo
Which will dump a bunch of registers and internal fifos so we can see
that the chip actually processed.

Alex

>
> Konrad,
>
> 10.09.2013, 17:25, "Konrad Rzeszutek Wilk" <konrad.wilk at oracle.com>:
>>
>> Is this platform enabling the SWIOTLB layer?
>
> Doesn't look like.
>
>> The reason I am asking is
>> b/c if you do indeed enable it you end up using the TTM DMA pool
>> which allocates pages using the dma_alloc_coherent - which means that
>> all of the pages that come out of TTM are already 'DMA' mapped.
>>
>> And that means the radeon_gart_bind and all its friends
>> use the DMA addresses that have been constructed by SWIOTLB IOMMU.
>>
>> Perhaps the PA-RISC IOMMU creates the DMA addresses differently?
>>
>> When the card gets programmed, you do end up using ttm_agp_bind right?
>> I am wondering if something like this:
>>
>> https://lkml.org/lkml/2010/12/6/512
>>
>> is needed to pass in the right DMA address?
>
> No idea how to modify ttm_agp_bind() this way, though doesn't matter if
> swiotlb isn't used anyway?