[PATCH 3/3] drm/radeon/cik: Program pipe configuration for 1D tiling modes as well
alexdeucher at gmail.com
Wed Sep 18 09:00:34 PDT 2013
On Wed, Sep 18, 2013 at 11:55 AM, Michel Dänzer <michel at daenzer.net> wrote:
> On Mit, 2013-09-18 at 09:56 -0400, Alex Deucher wrote:
>> On Wed, Sep 18, 2013 at 9:39 AM, Michel Dänzer <michel at daenzer.net> wrote:
>> > From: Michel Dänzer <michel.daenzer at amd.com>
>> > Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
>> > ---
>> > Not sure this is necessary, but AFAICT the pipe configuration applies to
>> > 1D tiling modes as well.
>> I don't think pipe config applies to 1D modes since they are fixed
>> size across asics.
> Makes sense. I noticed that we're setting pipe config for 1D tiling
> modes on SI as well, and the documentation I saw didn't explicitly say
> that it only applies to 2D tiling.
> Maybe we should remove the setting of pipe config and friends for 1D
> tiling modes on SI instead?
I suppose we should try and double check. The tiling settings
spreadsheets sets the fields for SI, but no CIK, but I don't think the
hw actually needs it.
> Earthling Michel Dänzer | http://www.amd.com
> Libre software enthusiast | Debian, X and DRI developer
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