[PATCH] drm/radeon/cik: Add tiling mode index for 1D tiled depth/stencil surfaces

Michel Dänzer michel at daenzer.net
Wed Sep 18 09:23:51 PDT 2013


From: Michel Dänzer <michel.daenzer at amd.com>

Signed-off-by: Michel Dänzer <michel.daenzer at amd.com>
---
 include/uapi/drm/radeon_drm.h | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h
index fa8b3ad..46d41e8 100644
--- a/include/uapi/drm/radeon_drm.h
+++ b/include/uapi/drm/radeon_drm.h
@@ -1007,4 +1007,6 @@ struct drm_radeon_info {
 #define SI_TILE_MODE_DEPTH_STENCIL_2D_4AA	3
 #define SI_TILE_MODE_DEPTH_STENCIL_2D_8AA	2
 
+#define CIK_TILE_MODE_DEPTH_STENCIL_1D		5
+
 #endif
-- 
1.8.4.rc3



More information about the dri-devel mailing list