[Bug 77009] 24P playback video signal loss with latest DRI patches

[bugzilla-daemon at freedesktop.org]

https://bugs.freedesktop.org/show_bug.cgi?id=77009

--- Comment #22 from Garrett <socalfisher at gmail.com> ---
Christian,
I managed to add only your patch solo:
https://bugs.freedesktop.org/attachment.cgi?id=96900&action=edit
It works great.  The mistake I made was ctrl-c/v from browser.  Bad chars I
assume.  White-space chrs?  

I am trying to understand the plls.  I read the org. bug report 76564.  I
assumed increasing the max would allow higher pll vals.  But it does go down
with some.  Does that make sense?  

from this patch applied to v2:

[   38.548302] [drm:drm_mode_debug_printmodeline], Modeline 32:"" 0 74176 1920
2558 2602 2750 1080 1084 1089 1125 0x0 0x5

  38.568903] [drm:radeon_compute_pll_avivo], 148340 - 14830, pll dividers - fb:
148.3 ref: 10, post 10
[   38.581485] [drm:drm_crtc_helper_set_mode], [ENCODER:17:TMDS-17] set
[MODE:32:]
[   38.581490] [drm:radeon_atom_encoder_dpms], encoder dpms 33 to mode 3,
devices 00000008, active_devices 00000008

Is this correct?
 from Modeline 32:  74176 * 2 = 148352 (LCD wants?) ~= 148300 (GPU makes?).  
Ideally we need 148350 (GPU)? 

Your patch does wonders for this A4-3400.  I am trying to understand it better.

Here your max is 100.  ref: 10, post 10  >>>> 10 * 10 = 100 max.

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