[PATCH] drm/radeon: Inline r100_mm_rreg, v2

Lauri Kasanen cand at gmx.com
Sat Apr 19 10:33:05 PDT 2014


On Sat, 19 Apr 2014 11:15:53 -0400
Alex Deucher <alexdeucher at gmail.com> wrote:

> On Sat, Apr 19, 2014 at 6:06 AM, Christian König
> >> This was originally un-inlined by Andi Kleen in 2011 citing size concerns.
> >> Indeed, a first attempt at inlining it grew radeon.ko by 7%.
> >>
> >> However, 2% of cpu is spent in this function. Simply inlining it gave 1%
> >> more fps
> >> in Urban Terror.
> >>
> >> v2: We know the minimum MMIO size. Adding it to the if allows the compiler
> >> to
> >> optimize the branch out, improving both performance and size.
> >>
> >> The v2 patch decreases radeon.ko size by 2%. I didn't re-benchmark, but
> >> common sense
> >> says perf is now more than 1% better.
> >
> > Nice!
> >
> > But are you sure that the register PCI bar is always at least 64K in size?
> > Keep in mind that this code is used over all generations since R100.
> > Additional to that we probably should have a define for that and also apply
> > the optimizations to r100_mm_wreg as well.

Yes, I checked the earlier code. It had 64kb hard-coded, and when it
was changed in 2010 to use the dynamic value, the commit said later
asics are larger. (07bec2df01)

A quick google also didn't find any dmesg with smaller values, R100
cards had 64kb.

> If most of the register accesses are for the interrupt setup, I wonder
> if it would be better to just clean up the irq_set functions to reduce
> the register accesses.  E.g., only touch the registers for the
> specific irq masks have changed.

Yes, that should also be done. But as this function is used elsewhere
as well, having it fast (not to mention the size decrease) would be
good.

I think this patch is safe enough for 3.15, but perhaps it's too late
now.

- Lauri


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