[PATCH] drm/radeon: Only flush HDP cache from idle ioctl if BO is in VRAM

[Marek Olšák]

No, it doesn't.

Marek

On Tue, Aug 5, 2014 at 10:55 AM, Michel Dänzer <michel at daenzer.net> wrote:
> On 05.08.2014 07:01, Marek Olšák wrote:
>> I'm afraid this won't always work and it can be a source of bugs.
>>
>> Userspace doesn't have to call GEM_WAIT_IDLE before a CPU access to a
>> VRAM buffer. For example, consider a wait-idle request with a non-zero
>> timeout, which is implemented as a loop which calls GEM_BUSY. Also,
>> userspace can use fences (alright they are backed by 1-page-sized VRAM
>> buffers at the moment) and it may use real fences in the future which
>> are not tied to a buffer object.
>>
>> If the HDP flush isn't allowed in userspace IBs, I think we will have
>> to expose it as an ioctl and call it explicitly from userspace.
>
> I understand your concerns, but my patch doesn't change anything wrt
> them, does it?
>
>
> --
> Earthling Michel Dänzer            |                  http://www.amd.com
> Libre software enthusiast          |                Mesa and X developer