[PATCH 1/2] drm/i915: Add #defines for short/long pulse on gmch platforms

Daniel Vetter daniel at ffwll.ch
Mon Jul 7 06:03:10 PDT 2014


On Tue, Jun 24, 2014 at 02:59:36PM -0700, Todd Previte wrote:
> These look like they're already integrated into -nightly? But for the
> record...

Oops, I've fumbled my branch management and accidentally pushed this patch
to dinq. Thanks anyway for reviewing this to make sure it's correct.
-Daniel

> 
> Reviewed-by: Todd Previte <tprevite at gmail.com>
> 
> -T
> 
> >Dave Airlie <mailto:airlied at gmail.com>
> >Tuesday, June 17, 2014 6:29 PM
> >From: Daniel Vetter <daniel.vetter at ffwll.ch>
> >
> >For no reason at all the public docs lack them, and Dave needs them
> >for his hpd interrupt rework.
> >
> >Cc: Dave Airlie <airlied at gmail.com>
> >Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
> >Signed-off-by: Dave Airlie <airlied at redhat.com>
> >---
> >drivers/gpu/drm/i915/i915_reg.h | 6 ++++++
> >1 file changed, 6 insertions(+)
> >
> >diff --git a/drivers/gpu/drm/i915/i915_reg.h
> >b/drivers/gpu/drm/i915/i915_reg.h
> >index 5122254..5d8ba0c 100644
> >--- a/drivers/gpu/drm/i915/i915_reg.h
> >+++ b/drivers/gpu/drm/i915/i915_reg.h
> >@@ -2526,8 +2526,14 @@ enum punit_power_well {
> >#define PORTC_HOTPLUG_LIVE_STATUS_VLV (1 << 28)
> >#define PORTB_HOTPLUG_LIVE_STATUS_VLV (1 << 29)
> >#define PORTD_HOTPLUG_INT_STATUS (3 << 21)
> >+#define PORTD_HOTPLUG_INT_LONG_PULSE (2 << 21)
> >+#define PORTD_HOTPLUG_INT_SHORT_PULSE (1 << 21)
> >#define PORTC_HOTPLUG_INT_STATUS (3 << 19)
> >+#define PORTC_HOTPLUG_INT_LONG_PULSE (2 << 19)
> >+#define PORTC_HOTPLUG_INT_SHORT_PULSE (1 << 19)
> >#define PORTB_HOTPLUG_INT_STATUS (3 << 17)
> >+#define PORTB_HOTPLUG_INT_LONG_PULSE (2 << 17)
> >+#define PORTB_HOTPLUG_INT_SHORT_PLUSE (1 << 17)
> >/* CRT/TV common between gen3+ */
> >#define CRT_HOTPLUG_INT_STATUS (1 << 11)
> >#define TV_HOTPLUG_INT_STATUS (1 << 10)
> >Dave Airlie <mailto:airlied at gmail.com>
> >Tuesday, June 17, 2014 6:29 PM
> >Can we get these merged or even looked at?, they are blocking the whole
> >MST progress,
> >and I don't have any insight to secret Intel review process. :-)
> >
> >Dave.
> >
> >_______________________________________________
> >Intel-gfx mailing list
> >Intel-gfx at lists.freedesktop.org
> >http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
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-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch


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