[PATCH] drm/radeon: add HDMI/DP sink description to ELD like data

[Alex Deucher]

On Wed, Jul 9, 2014 at 6:13 PM, Stefan Bruens
<stefan.bruens at rwth-aachen.de> wrote:
> Provide monitor name and product/manufacturer id to alsa hda driver. The output
> matches the fglrx settings, short of the port_id. As the latter is not standardized,
> leave it out for now.
>
> Corresponding alsa code is already in place.
>
> Signed-off-by: Stefan Brüns <stefan.bruens at rwth-aachen.de>

Applied to my 3.17 tree.  thanks!

Alex

> ---
> The fglrx register settings where retrieved using Rafal Mileckis gdb script.
> After applying the patch fglrx and radeon register settings for sink info match,
> short of the port_id.
>
> Regarding port id, see comment by Takashi Iwai, 14 Nov 2013:
> http://www.spinics.net/linux/fedora/alsa-user/msg12453.html
> and RFC by Stephen Warren (NVidia), 25 May 2011:
> http://lists.freedesktop.org/pipermail/xorg/2011-May/052893.html
>
>  drivers/gpu/drm/radeon/dce6_afmt.c      | 67 +++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/radeon/evergreen_hdmi.c |  2 +
>  2 files changed, 69 insertions(+)
>
> diff --git a/drivers/gpu/drm/radeon/dce6_afmt.c b/drivers/gpu/drm/radeon/dce6_afmt.c
> index 0a65dc7..1adf95a 100644
> --- a/drivers/gpu/drm/radeon/dce6_afmt.c
> +++ b/drivers/gpu/drm/radeon/dce6_afmt.c
> @@ -273,6 +273,73 @@ void dce6_afmt_write_sad_regs(struct drm_encoder *encoder)
>         kfree(sads);
>  }
>
> +void dce6_afmt_write_sinkinfo(struct drm_encoder *encoder)
> +{
> +       struct radeon_device *rdev = encoder->dev->dev_private;
> +       struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
> +       struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
> +       struct drm_connector *connector;
> +       u32 tmp = 0, offset;
> +       char description[18];
> +       uint8_t *eld;
> +
> +       if (!dig || !dig->afmt || !dig->afmt->pin)
> +               return;
> +
> +       offset = dig->afmt->pin->offset;
> +
> +       list_for_each_entry(connector, &encoder->dev->mode_config.connector_list, head) {
> +               if (connector->encoder == encoder)
> +                       break;
> +       }
> +
> +       if (!connector) {
> +               DRM_ERROR("Couldn't find encoder's connector\n");
> +               return;
> +       }
> +
> +       if (!connector->eld[0]) {
> +               DRM_ERROR("Connector has no ELD\n");
> +               return;
> +       }
> +
> +       eld = connector->eld;
> +
> +       tmp = MANUFACTURER_ID(eld[16]<<8 | eld[17]) | PRODUCT_ID(eld[18]<<8 | eld[19]);
> +       WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_SINK_INFO0, tmp);
> +
> +       tmp = SINK_DESCRIPTION_LEN(strlen(&eld[20])) + 1;
> +       tmp = (tmp > 19) ? 19 : tmp;
> +       WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_SINK_INFO1, tmp);
> +
> +       strncpy(description, &eld[20], 18);
> +
> +       tmp = PORT_ID0(0x1);
> +       //WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_SINK_INFO2, tmp);
> +
> +       tmp = PORT_ID1(0x100);
> +       //WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_SINK_INFO3, tmp);
> +
> +       tmp = DESCRIPTION0(description[0]) | DESCRIPTION1(description[1]) |
> +             DESCRIPTION2(description[2]) | DESCRIPTION3(description[3]);
> +       WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_SINK_INFO4, tmp);
> +
> +       tmp = DESCRIPTION4(description[4]) | DESCRIPTION5(description[5]) |
> +             DESCRIPTION6(description[6]) | DESCRIPTION7(description[7]);
> +       WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_SINK_INFO5, tmp);
> +
> +       tmp = DESCRIPTION8(description[8]) | DESCRIPTION9(description[9]) |
> +             DESCRIPTION10(description[10]) | DESCRIPTION11(description[11]);
> +       WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_SINK_INFO6, tmp);
> +
> +       tmp = DESCRIPTION12(description[12]) | DESCRIPTION13(description[13]) |
> +             DESCRIPTION14(description[14]) | DESCRIPTION15(description[15]);
> +       WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_SINK_INFO7, tmp);
> +
> +       tmp = DESCRIPTION16(description[16]) | DESCRIPTION17(description[17]);
> +       WREG32_ENDPOINT(offset, AZ_F0_CODEC_PIN_CONTROL_SINK_INFO8, tmp);
> +}
> +
>  static int dce6_audio_chipset_supported(struct radeon_device *rdev)
>  {
>         return !ASIC_IS_NODCE(rdev);
> diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.c b/drivers/gpu/drm/radeon/evergreen_hdmi.c
> index 1ec0e6e..b04ec3b 100644
> --- a/drivers/gpu/drm/radeon/evergreen_hdmi.c
> +++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c
> @@ -37,6 +37,7 @@ extern void dce6_afmt_write_sad_regs(struct drm_encoder *encoder);
>  extern void dce6_afmt_select_pin(struct drm_encoder *encoder);
>  extern void dce6_afmt_write_latency_fields(struct drm_encoder *encoder,
>                                            struct drm_display_mode *mode);
> +extern void dce6_afmt_write_sinkinfo(struct drm_encoder *encoder);
>
>  /*
>   * update the N and CTS parameters for a given pixel clock rate
> @@ -425,6 +426,7 @@ void evergreen_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode
>                 dce6_afmt_select_pin(encoder);
>                 dce6_afmt_write_sad_regs(encoder);
>                 dce6_afmt_write_latency_fields(encoder, mode);
> +               dce6_afmt_write_sinkinfo(encoder);
>         } else {
>                 evergreen_hdmi_write_sad_regs(encoder);
>                 dce4_afmt_write_latency_fields(encoder, mode);
> --
> 1.8.4.5
>
>
> --
> Stefan Brüns  /  Bergstraße 21  /  52062 Aachen
> home: +49 241 53809034     mobile: +49 151 50412019
> _______________________________________________
> dri-devel mailing list
> dri-devel at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/dri-devel