[PATCH] drm/radeon: also try GART for CPU accessed buffers

Alex Deucher alexdeucher at gmail.com
Tue May 6 09:36:04 PDT 2014


On Tue, May 6, 2014 at 12:35 PM, Christian König
<deathsimple at vodafone.de> wrote:
> From: Christian König <christian.koenig at amd.com>
>
> Placing them exclusively into VRAM might not work all the time.
>
> Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=78297
>
> Signed-off-by: Christian König <christian.koenig at amd.com>
> Cc: stable at vger.kernel.org

Reviewed-by: Alex Deucher <alexander.deucher at amd.com>

> ---
>  drivers/gpu/drm/radeon/radeon_object.c | 38 ++++++++++++++++++++--------------
>  1 file changed, 23 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
> index 19bec0d..72705fb 100644
> --- a/drivers/gpu/drm/radeon/radeon_object.c
> +++ b/drivers/gpu/drm/radeon/radeon_object.c
> @@ -699,22 +699,30 @@ int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
>         rbo = container_of(bo, struct radeon_bo, tbo);
>         radeon_bo_check_tiling(rbo, 0, 0);
>         rdev = rbo->rdev;
> -       if (bo->mem.mem_type == TTM_PL_VRAM) {
> -               size = bo->mem.num_pages << PAGE_SHIFT;
> -               offset = bo->mem.start << PAGE_SHIFT;
> -               if ((offset + size) > rdev->mc.visible_vram_size) {
> -                       /* hurrah the memory is not visible ! */
> -                       radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM);
> -                       rbo->placement.lpfn = rdev->mc.visible_vram_size >> PAGE_SHIFT;
> -                       r = ttm_bo_validate(bo, &rbo->placement, false, false);
> -                       if (unlikely(r != 0))
> -                               return r;
> -                       offset = bo->mem.start << PAGE_SHIFT;
> -                       /* this should not happen */
> -                       if ((offset + size) > rdev->mc.visible_vram_size)
> -                               return -EINVAL;
> -               }
> +       if (bo->mem.mem_type != TTM_PL_VRAM)
> +               return 0;
> +
> +       size = bo->mem.num_pages << PAGE_SHIFT;
> +       offset = bo->mem.start << PAGE_SHIFT;
> +       if ((offset + size) <= rdev->mc.visible_vram_size)
> +               return 0;
> +
> +       /* hurrah the memory is not visible ! */
> +       radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM);
> +       rbo->placement.lpfn = rdev->mc.visible_vram_size >> PAGE_SHIFT;
> +       r = ttm_bo_validate(bo, &rbo->placement, false, false);
> +       if (unlikely(r == -ENOMEM)) {
> +               radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
> +               return ttm_bo_validate(bo, &rbo->placement, false, false);
> +       } else if (unlikely(r != 0)) {
> +               return r;
>         }
> +
> +       offset = bo->mem.start << PAGE_SHIFT;
> +       /* this should never happen */
> +       if ((offset + size) > rdev->mc.visible_vram_size)
> +               return -EINVAL;
> +
>         return 0;
>  }
>
> --
> 1.9.1
>
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