[PATCH] drm/radeon: fix typo in finding PLL params
Christian König
deathsimple at vodafone.de
Tue May 13 09:16:29 PDT 2014
From: Christian König <christian.koenig at amd.com>
Otherwise the limit is raised to high.
Signed-off-by: Christian König <christian.koenig at amd.com>
Tested-by: Ken Moffat <zarniwhoop at ntlworld.com>
---
drivers/gpu/drm/radeon/radeon_display.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 408b6ac..f00dbbf 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -999,7 +999,7 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
/* avoid high jitter with small fractional dividers */
if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV && (fb_div % 10)) {
- fb_div_min = max(fb_div_min, (9 - (fb_div % 10)) * 20 + 60);
+ fb_div_min = max(fb_div_min, (9 - (fb_div % 10)) * 20 + 50);
if (fb_div < fb_div_min) {
unsigned tmp = DIV_ROUND_UP(fb_div_min, fb_div);
fb_div *= tmp;
--
1.9.1
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