[deathsimple/drm-next-3.16][PATCH V3 2/4] drm/radeon/hdmi: DCE3: clean ACR control

Rafał Miłecki zajec5 at gmail.com
Fri May 16 16:34:56 PDT 2014

On 17 May 2014 00:00, Alex Deucher <alexdeucher at gmail.com> wrote:
> On Fri, May 16, 2014 at 5:10 AM, Rafał Miłecki <zajec5 at gmail.com> wrote:
>> +#define DCE3_HDMI0_AUDIO_CRC_CONTROL   0x74dc
> They aren't swapped in hw, the register defines were just accidentally
> swapped in the header (probably a copy paste typo).  Just swap the
> defines.  No need to keep the old values.

Are you sure about this? I've doubts because fglrx indeed uses
0x74dc for DCE2
0x740c for DCE3

Previously you wrote: "On DCE3, they should be ...".

I suspect we may still need old defines to support DCE2.

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