[PATCH 2/4] drm/ttm: introduce dma cache sync helpers
thierry.reding at gmail.com
Fri May 23 00:31:59 PDT 2014
On Fri, May 23, 2014 at 02:49:40PM +0900, Alexandre Courbot wrote:
> On Mon, May 19, 2014 at 5:33 PM, Thierry Reding
> <thierry.reding at gmail.com> wrote:
> > On Mon, May 19, 2014 at 04:10:56PM +0900, Alexandre Courbot wrote:
> >> From: Lucas Stach <dev at lynxeye.de>
> >> On arches with non-coherent PCI,
> > I guess since this applies to gk20a
> >> we need to flush caches ourselfes at
> > "ourselves". Or perhaps even reword to something like: "..., caches need
> > to be flushed and invalidated explicitly", since dma_sync_for_cpu() does
> > invalidate rather than flush.
> Rephrased as "On arches for which access to GPU memory is non-coherent, caches
> need to be flushed and invalidated explicitly at the appropriate places."
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