[PATCH 05/72] ARM: i.MX6: select pll3_usb_otg for ldb_di for rev 1.0 chip

Steve Longerbeam steve_longerbeam at mentor.com
Mon Nov 3 11:17:10 PST 2014


On 11/03/2014 04:30 AM, Philipp Zabel wrote:
> Am Freitag, den 31.10.2014, 15:53 -0700 schrieb Steve Longerbeam:
>> Select pll3_usb_otg for ldb_di clock for rev 1.0 chips.
>>
>> Signed-off-by: Jiada Wang <jiada_wang at mentor.com>
>> Signed-off-by: Steve Longerbeam <steve_longerbeam at mentor.com>
>> ---
>>  arch/arm/mach-imx/clk-imx6q.c |    3 +++
>>  1 file changed, 3 insertions(+)
>>
>> diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
>> index 86b58fc..68064a6 100644
>> --- a/arch/arm/mach-imx/clk-imx6q.c
>> +++ b/arch/arm/mach-imx/clk-imx6q.c
>> @@ -481,6 +481,9 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
>>  	    cpu_is_imx6dl()) {
>>  		clk_set_parent(clk[IMX6QDL_CLK_LDB_DI0_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
>>  		clk_set_parent(clk[IMX6QDL_CLK_LDB_DI1_SEL], clk[IMX6QDL_CLK_PLL5_VIDEO_DIV]);
>> +	} else {
>> +		clk_set_parent(clk[IMX6QDL_CLK_LDB_DI0_SEL], clk[IMX6QDL_CLK_PLL3_USB_OTG]);
>> +		clk_set_parent(clk[IMX6QDL_CLK_LDB_DI1_SEL], clk[IMX6QDL_CLK_PLL3_USB_OTG]);
>>  	}
>>  
>>  	clk_set_parent(clk[IMX6QDL_CLK_IPU1_DI0_PRE_SEL], clk[IMX6QDL_CLK_PLL2_PFD0_352M]);
> Does the issue with the LDB DI mux glitch locking up the LDB DI divider
> also affect rev 1.0 silicon?
> (http://lists.infradead.org/pipermail/linux-arm-kernel/2014-July/268864.html)

I can't say for sure, but I would guess that it does.

Internally we are using Freescale's workaround patch for this problem,
but it has a lot of issues, most of which is that it needs to be incorporated
into the clk API so that the workaround would be applied whenever the
LDB parent mux is changed.

Steve


More information about the dri-devel mailing list