[PATCH] [libdrm] intel: Add decode for Gen7 3DSTATE_DEPTH_BUFFER

Chris Forbes chrisf at ijw.co.nz
Mon Nov 24 01:48:18 PST 2014


Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
---
 intel/intel_decode.c              | 57 +++++++++++++++++++++++++++++++--------
 intel/tests/gen7-3d.batch-ref.txt | 12 ++++-----
 2 files changed, 52 insertions(+), 17 deletions(-)

diff --git a/intel/intel_decode.c b/intel/intel_decode.c
index adda29a..0c3c943 100644
--- a/intel/intel_decode.c
+++ b/intel/intel_decode.c
@@ -2637,6 +2637,20 @@ static const char *get_965_depthformat(unsigned int depthformat)
 	}
 }
 
+static const char *get_gen7_depthformat(unsigned int depthformat)
+{
+	switch (depthformat) {
+	case 1:
+		return "z32float";
+	case 3:
+		return "z24x8";
+	case 5:
+		return "z16";
+	default:
+		return "unknown";
+	}
+}
+
 static const char *get_965_element_component(uint32_t data, int component)
 {
 	uint32_t component_control = (data >> (16 + (3 - component) * 4)) & 0x7;
@@ -3363,17 +3377,38 @@ decode_3d_965(struct drm_intel_decode *ctx)
 		instr_out(ctx, 3, "WM sampler state\n");
 		return len;
 	case 0x7805:
-		/* Actually 3DSTATE_DEPTH_BUFFER on gen7. */
-		if (ctx->gen == 7)
-			break;
-
-		instr_out(ctx, 0, "3DSTATE_URB\n");
-		instr_out(ctx, 1,
-			  "VS entries %d, alloc size %d (1024bit row)\n",
-			  data[1] & 0xffff, ((data[1] >> 16) & 0x07f) + 1);
-		instr_out(ctx, 2,
-			  "GS entries %d, alloc size %d (1024bit row)\n",
-			  (data[2] >> 8) & 0x3ff, (data[2] & 7) + 1);
+		if (ctx->gen >= 7) {
+			/* 3DSTATE_DEPTH_BUFFER on gen7. */
+			instr_out(ctx, 0, "3DSTATE_DEPTH_BUFFER\n");
+			instr_out(ctx, 1, "%s %s pitch = %d ZWr%s SWr%s Hiz%s\n",
+				  get_965_surfacetype(data[1] >> 29),
+				  get_gen7_depthformat((data[1] >> 18) & 0x7),
+				  (data[1] & 0x1ffff) + 1,
+				  data[1] & (1<<28) ? "On" : "Off",
+				  data[1] & (1<<27) ? "On" : "Off",
+				  data[1] & (1<<22) ? "On" : "Off"
+				  );
+			instr_out(ctx, 2, "surface base address\n");
+			instr_out(ctx, 3, "width = %d height = %d lod = %d\n",
+				  ((data[3] >> 4) & 0x3fff) + 1,
+				  (data[3] >> 18) + 1,
+				  data[3] & 0xf);
+			instr_out(ctx, 4, "depth = %d minlayer = %d\n",
+				  (data[4] >> 21) + 1,
+				  (data[4] >> 10) & 0x7ff);
+			instr_out(ctx, 5, "offsets\n");
+			instr_out(ctx, 6, "view extent = %d\n",
+				  (data[6] >> 21));
+		} else {
+			/* 3DSTATE_URB on <= gen6. */
+			instr_out(ctx, 0, "3DSTATE_URB\n");
+			instr_out(ctx, 1,
+				  "VS entries %d, alloc size %d (1024bit row)\n",
+				  data[1] & 0xffff, ((data[1] >> 16) & 0x07f) + 1);
+			instr_out(ctx, 2,
+				  "GS entries %d, alloc size %d (1024bit row)\n",
+				  (data[2] >> 8) & 0x3ff, (data[2] & 7) + 1);
+		}
 		return len;
 
 	case 0x7808:
diff --git a/intel/tests/gen7-3d.batch-ref.txt b/intel/tests/gen7-3d.batch-ref.txt
index cd2dfc4..db70625 100644
--- a/intel/tests/gen7-3d.batch-ref.txt
+++ b/intel/tests/gen7-3d.batch-ref.txt
@@ -173,12 +173,12 @@
 0x123002b0:      0x00000000:    
 0x123002b4:      0x00000000:    
 0x123002b8:      0x78050005: 3DSTATE_DEPTH_BUFFER
-0x123002bc:      0xe0040000:    dword 1
-0x123002c0:      0x00000000:    dword 2
-0x123002c4:      0x00000000:    dword 3
-0x123002c8:      0x00000000:    dword 4
-0x123002cc:      0x00000000:    dword 5
-0x123002d0:      0x00000000:    dword 6
+0x123002bc:      0xe0040000:    NULL z32float pitch = 1 ZWrOff SWrOff HizOff
+0x123002c0:      0x00000000:    surface base address
+0x123002c4:      0x00000000:    width = 1 height = 1 lod = 0
+0x123002c8:      0x00000000:    depth = 1 minlayer = 0
+0x123002cc:      0x00000000:    offsets
+0x123002d0:      0x00000000:    view extent = 0
 0x123002d4:      0x78070001: 3DSTATE_HIER_DEPTH_BUFFER
 0x123002d8:      0x00000000:    pitch 1b
 0x123002dc:      0x00000000:    pointer to HiZ buffer
-- 
2.1.3



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