[PULL] drm-intel-next, take 3
Daniel Vetter
daniel.vetter at ffwll.ch
Fri Oct 24 07:33:33 PDT 2014
Hi Dave,
Ok, new attempt, this time around with full ppgtt disabled again.
drm-intel-next-2014-10-03:
- first batch of skl stage 1 enabling
- fixes from Rodrigo to the PSR, fbc and sink crc code
- kerneldoc for the frontbuffer tracking code, runtime pm code and the basic
interrupt enable/disable functions
- smaller stuff all over
drm-intel-next-2014-09-19:
- bunch more i830M fixes from Ville
- full ppgtt now again enabled by default
- more ppgtt fixes from Michel Thierry and Chris Wilson
- plane config work from Gustavo Padovan
- spinlock clarifications
- piles of smaller improvements all over, as usual
Cheers, Daniel
The following changes since commit 07c338ce98263a5af631b991dd8f96cff6ca2548:
drm/i915: fix short vs. long hpd detection (2014-10-16 15:00:28 +0300)
are available in the git repository at:
git://anongit.freedesktop.org/drm-intel tags/drm-intel-next-2014-10-03-no-ppgtt
for you to fetch changes up to cacc6c837b799b058d59d2af02c11140640cc1d2:
Revert "drm/i915: Enable full PPGTT on gen7" (2014-10-24 16:30:14 +0200)
----------------------------------------------------------------
Brad Volkin (2):
drm/i915: Re-enable the command parser when using PPGTT
drm/i915: Log a message when rejecting LRM to OACONTROL
Chris Wilson (3):
drm/i915: Remove dead code, i915_gem_verify_gtt
drm/i915: Inline feature detection into sanitize_enable_ppgtt
drm/i915: Remove the duplicated logic between the two shrink phases
Daisy Sun (1):
drm/i915/skl: SKL FBC enablement
Damien Lespiau (31):
drm/i915/skl: Add the Skylake PCI ids
drm/i915/skl: Add an IS_GEN9() define
drm/i915/skl: Fence registers on SKL are the same as SNB
drm/i915/skl: Provide a placeholder for init_clock_gating()
drm/i915/skl: Skylake shares the interrupt logic with Broadwell
drm/i915/skl: Framebuffers need to be aligned to 256KB on Skylake
drm/i915/skl: Implement the new update_plane() for primary planes
drm/i915/skl: Don't create a VGA connector on Skylake
drm/i915/skl: Don't try to read out the PCH transcoder state if not present
drm/i915/skl: Program the DDI buffer translation tables
drm/i915/skl: Add support for DP voltage swings and pre-emphasis
drm/i915/skl: Skylake moves AUX_CTL from PCH to CPU
drm/i915/skl: Add the additional graphics stolen sizes
drm/i915/skl: gen9 uses the same bind_vma() vfuncs as gen6+
drm/i915/skl: Implement the get_aux_clock_divider() DP vfunc
drm/i915/skl: Provide a get_aux_send_ctl() vfunc for skylake
drm/i915/skl: Initialize PPGTT like gen8
drm/i915/skl: Allow the reg_read ioctl to return RCS_TIMESTAMP
drm/i915/skl: report the same INSTDONE registers as gen8
drm/i915/skl: Report the PDP regs as in gen8
drm/i915/skl: SKL shares the same underrun interrupt as BDW
drm/i915/skl: Adjust the display engine interrupts
drm/i915/skl: Implement WaDisableSDEUnitClockGating:skl
drm/i915/skl: Implement Wa4x4STCOptimizationDisable:skl
drm/i915/skl: Implement WaDisableDgMirrorFixInHalfSliceChicken5:skl
drm/i915/skl: Skylake has 2 "sprite" planes per pipe
drm/i915/skl: Implement drm_plane vfuncs
drm/i915/skl: Adjust assert_sprites_disabled()
drm/i915/skl: Introduce a I915_MAX_PLANES macro
drm/i915/skl: Introduce intel_num_planes()
drm/i915/skl: Move gen9 pm initialization into its own branch
Daniel Vetter (37):
drm/i915: WARN if interrupts aren't on in en/disable_pipestat
drm/i915: Restore resume irq ordering comment
drm/i915: Drop get/put_pages for scratch page
agp/intel-gtt: Remove get/put_pages
drm/i915: Fix irq checks in ring->irq_get/put functions
drm/i915: Convert backlight_lock to a mutex
drm/i915: Use generic vblank wait
drm/i915: static inline for intel_wait_for_vblank
drm/i915: Clarify event_lock locking, process context
drm/i915: Clarify event_lock locking, irq&mixed context
drm/i915: Clarify gpu_error.lock locking
drm/i915: Clarify irq_lock locking, intel_tv_detect
drm/i915: Clarify irq_lock locking, work functions
drm/i915: Clarify irq_lock locking, interrupt install/uninstall
drm/i915: Clarify irq_lock locking, irq handlers
drm/i915: Clarify irq_lock locking, special cases
drm/i915: Clarify uncore.lock locking
drm/i915: Clarify mmio_flip_lock locking
drm/i915: Update DRIVER_DATE to 20140919
drm/i915: DocBook integration for frontbuffer tracking
Merge branch 'topic/skl-stage1' into drm-intel-next-queued
drm/i915: Tighting frontbuffer tracking around flips
drm/i915: spelling fixes for frontbuffer tracking kerneldoc
drm/i915: Remove intel_modeset_suspend_hw
drm/i915: Extract intel_runtime_pm.c
drm/i915: Bikeshed rpm functions name a bit.
drm/i915: Move intel_display_set_init_power to intel_runtime_pm.c
drm/i915: Call runtime_pm_disable directly
drm/i915: Kerneldoc for intel_runtime_pm.c
drm/i915: Reinstate error level message for non-simulated gpu hangs
drm/i915: Constify send buffer for intel_dp_aux_ch
drm/i915: s/pm._irqs_disabled/pm.irqs_enabled/
drm/i915: Use dev_priv instead of dev in irq setup functions
drm/i915: kerneldoc for interrupt enable/disable functions
drm/i915: Update DRIVER_DATE to 20141003
Merge branch 'drm-intel-next-fixes' into drm-intel-next
Revert "drm/i915: Enable full PPGTT on gen7"
Deepak S (1):
drm/i915/vlv: Remove check for Old Ack during forcewake
Gustavo Padovan (8):
drm/i915: create struct intel_plane_state
drm/i915: split intel_update_plane into check() and commit()
drm/i915: split intel_cursor_plane_update() into check() and commit()
drm/i915: split intel_primary_plane_setplane() into check() and commit()
drm/i915: remove !enabled handling from commit primary plane step
drm/i915: pin sprite fb only if it changed
drm/i915: create intel_update_pipe_size()
drm/i915: Fix regression in the sprite plane update split
Imre Deak (2):
drm/i915: vlv: fix display IRQ enable/disable
drm/i915/skl: don't set the AsyncFlip performance mode for Gen9+
Jani Nikula (1):
drm/i915/bios: add missing __packed to structs used for reading vbt
Michel Thierry (1):
drm/i915: Enable full PPGTT on gen7
Paulo Zanoni (2):
drm/i915: extract intel_init_fbc()
drm/i915: add SW tracking to FBC enabling
Robert Beckett (1):
drm/i915/skl: i915_swizzle_info gen9 fix
Rodrigo Vivi (14):
drm/i915: Only flush fbc on sw when fbc is enabled.
drm/i915: Avoid reading fbc registers in vain when fbc was never enabled.
drm/i915: PSR: organize setup function.
drm/i915: PSR: Organize PSR enable function
drm/i915: Avoid re-configure panel on every PSR re-enable.
drm/i915: Minimize the huge amount of unecessary fbc sw cache clean.
drm/i915: Make sure PSR is ready for been re-enabled.
drm/i915: Broadwell DDI Buffer translation changed to give better margin.
drm/i915: Broadwell DDI Buffer translation - more tuning
drm/i915: Fix Sink CRC
drm/i915: Add IS_BDW_GT3 macro.
drm/i915/bdw: WaDisableFenceDestinationToSLM
drm/i915: preserve other DP_TEST_SINK bits.
drm/i915: make sink_crc return -EIO on aux read/write failure
Satheeshakrishna M (6):
drm/i915/skl: Add an IS_SKYLAKE macro
drm/i915/skl: SKL pipe misc programming
drm/i915/skl: vfuncs for skl eld and global resource
drm/i915/skl: SKL backlight enabling
drm/i915/skl: Restore pipe B/C interrupts
drm/i915/skl: Sunrise Point PCH detection
Ville Syrjälä (6):
drm/i915: Move the cursor_base setup to i{845, 9xx}_update_cursor()
drm/i915: Only set CURSOR_PIPE_CSC_ENABLE when cursor is enabled
drm/i915: Move vblank enable earlier and disable later
drm/i915: De-magic the PSR AUX message
drm/i915: Make sure hardware uses the correct swing margin/deemph bits on chv
drm/i915: Clear TX FIFO reset master override bits on chv
Documentation/DocBook/drm.tmpl | 30 +-
.../devicetree/bindings/video/exynos_dsim.txt | 1 +
.../devicetree/bindings/video/samsung-fimd.txt | 1 +
arch/arm/boot/dts/exynos3250.dtsi | 33 +
arch/x86/kernel/early-quirks.c | 23 +
drivers/char/agp/intel-gtt.c | 4 -
drivers/gpu/drm/armada/armada_gem.h | 2 +
drivers/gpu/drm/ast/ast_drv.h | 2 +
drivers/gpu/drm/ast/ast_ttm.c | 2 +-
drivers/gpu/drm/bochs/bochs.h | 2 +
drivers/gpu/drm/bochs/bochs_mm.c | 2 +-
drivers/gpu/drm/cirrus/cirrus_drv.h | 2 +
drivers/gpu/drm/cirrus/cirrus_ttm.c | 2 +-
drivers/gpu/drm/drm_drv.c | 7 +-
drivers/gpu/drm/drm_gem.c | 3 +-
drivers/gpu/drm/drm_info.c | 2 +
drivers/gpu/drm/drm_internal.h | 39 +-
drivers/gpu/drm/drm_mipi_dsi.c | 6 +
drivers/gpu/drm/drm_prime.c | 2 +
drivers/gpu/drm/drm_vm.c | 13 +-
drivers/gpu/drm/exynos/exynos_dp_core.c | 4 +-
drivers/gpu/drm/exynos/exynos_drm_crtc.c | 62 +-
drivers/gpu/drm/exynos/exynos_drm_dpi.c | 6 +-
drivers/gpu/drm/exynos/exynos_drm_drv.c | 103 +-
drivers/gpu/drm/exynos/exynos_drm_drv.h | 1 -
drivers/gpu/drm/exynos/exynos_drm_dsi.c | 40 +-
drivers/gpu/drm/exynos/exynos_drm_fb.c | 1 +
drivers/gpu/drm/exynos/exynos_drm_fbdev.c | 4 +-
drivers/gpu/drm/exynos/exynos_drm_fimc.c | 90 +-
drivers/gpu/drm/exynos/exynos_drm_fimd.c | 55 +-
drivers/gpu/drm/exynos/exynos_drm_gem.c | 106 +-
drivers/gpu/drm/exynos/exynos_drm_gem.h | 16 +-
drivers/gpu/drm/exynos/exynos_drm_gsc.c | 3 +-
drivers/gpu/drm/exynos/exynos_drm_ipp.c | 453 +++----
drivers/gpu/drm/exynos/exynos_drm_ipp.h | 4 +-
drivers/gpu/drm/exynos/exynos_drm_plane.c | 19 +-
drivers/gpu/drm/exynos/exynos_drm_plane.h | 3 +-
drivers/gpu/drm/exynos/exynos_drm_rotator.c | 3 +-
drivers/gpu/drm/exynos/exynos_drm_vidi.c | 19 -
drivers/gpu/drm/exynos/exynos_hdmi.c | 4 +-
drivers/gpu/drm/exynos/exynos_mixer.c | 3 -
drivers/gpu/drm/gma500/gtt.h | 1 +
drivers/gpu/drm/i810/i810_drv.c | 2 +-
drivers/gpu/drm/i915/Makefile | 5 +-
drivers/gpu/drm/i915/i915_cmd_parser.c | 11 +-
drivers/gpu/drm/i915/i915_debugfs.c | 9 +-
drivers/gpu/drm/i915/i915_dma.c | 29 +-
drivers/gpu/drm/i915/i915_drv.c | 49 +-
drivers/gpu/drm/i915/i915_drv.h | 49 +-
drivers/gpu/drm/i915/i915_gem.c | 101 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 36 +-
drivers/gpu/drm/i915/i915_gpu_error.c | 13 +-
drivers/gpu/drm/i915/i915_irq.c | 274 ++--
drivers/gpu/drm/i915/i915_reg.h | 190 ++-
drivers/gpu/drm/i915/intel_bios.h | 10 +-
drivers/gpu/drm/i915/intel_crt.c | 2 +-
drivers/gpu/drm/i915/intel_ddi.c | 52 +-
drivers/gpu/drm/i915/intel_display.c | 895 ++++++-------
drivers/gpu/drm/i915/intel_dp.c | 194 ++-
drivers/gpu/drm/i915/intel_drv.h | 90 +-
drivers/gpu/drm/i915/intel_dsi.c | 2 +-
drivers/gpu/drm/i915/intel_frontbuffer.c | 279 ++++
drivers/gpu/drm/i915/intel_hdmi.c | 25 +-
drivers/gpu/drm/i915/intel_lrc.c | 2 +-
drivers/gpu/drm/i915/intel_lvds.c | 2 +-
drivers/gpu/drm/i915/intel_panel.c | 32 +-
drivers/gpu/drm/i915/intel_pm.c | 1247 +-----------------
drivers/gpu/drm/i915/intel_ringbuffer.c | 34 +-
drivers/gpu/drm/i915/intel_runtime_pm.c | 1375 ++++++++++++++++++++
drivers/gpu/drm/i915/intel_sprite.c | 473 +++++--
drivers/gpu/drm/i915/intel_tv.c | 9 +-
drivers/gpu/drm/i915/intel_uncore.c | 19 +-
drivers/gpu/drm/mga/mga_drv.c | 2 +-
drivers/gpu/drm/mgag200/mgag200_drv.h | 2 +
drivers/gpu/drm/mgag200/mgag200_ttm.c | 2 +-
drivers/gpu/drm/msm/msm_drv.h | 1 +
drivers/gpu/drm/nouveau/nouveau_bo.h | 2 +
drivers/gpu/drm/nouveau/nouveau_ttm.c | 2 +-
drivers/gpu/drm/omapdrm/omap_drv.h | 1 +
drivers/gpu/drm/qxl/qxl_drv.h | 2 +
drivers/gpu/drm/qxl/qxl_ttm.c | 2 +-
drivers/gpu/drm/r128/r128_drv.c | 2 +-
drivers/gpu/drm/radeon/radeon.h | 2 +
drivers/gpu/drm/radeon/radeon_drv.c | 4 +-
drivers/gpu/drm/radeon/radeon_ttm.c | 23 +-
drivers/gpu/drm/savage/savage_drv.c | 2 +-
drivers/gpu/drm/sis/sis_drv.c | 2 +-
drivers/gpu/drm/tdfx/tdfx_drv.c | 3 +-
drivers/gpu/drm/tegra/gem.h | 1 +
drivers/gpu/drm/ttm/ttm_bo_util.c | 20 +-
drivers/gpu/drm/ttm/ttm_bo_vm.c | 5 +-
drivers/gpu/drm/udl/udl_drv.h | 1 +
drivers/gpu/drm/via/via_drv.c | 2 +-
include/drm/drmP.h | 184 +--
include/drm/drm_dp_helper.h | 5 +-
include/drm/drm_gem.h | 183 +++
include/drm/drm_gem_cma_helper.h | 1 +
include/drm/drm_legacy.h | 1 +
include/drm/drm_mipi_dsi.h | 2 +
include/drm/i915_pciids.h | 17 +
include/uapi/drm/exynos_drm.h | 40 -
101 files changed, 4139 insertions(+), 3065 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_frontbuffer.c
create mode 100644 drivers/gpu/drm/i915/intel_runtime_pm.c
create mode 100644 include/drm/drm_gem.h
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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