nouveau regression: read fault PAGE_NOT_PRESENT with new fence interface
Maarten Lankhorst
maarten.lankhorst at canonical.com
Mon Sep 22 01:38:05 PDT 2014
Hey,
Op 18-09-14 om 22:07 schreef Ted Percival:
> Hi, I noticed a regression in the next-20140903 kernel that was not
> present in next-20140902. When Xorg starts up, the display is garbled
> (or contains old image bits) and I see a page fault in the kernel log. X
> is not usable in this state - there is no pointer and gdm doesn't come
> up. It works fine after Xorg (gdm3) is restarted. The fault is still
> present in next-20140918.
>
> [drm] Initialized nouveau 1.2.0 20120801 for 0000:01:00.0 on minor 0
> nouveau E[ PFIFO][0000:01:00.0] read fault at 0x0001260000
> [PAGE_NOT_PRESENT] from PGRAPH/GPC0/TEX on channel 0x001fcd1000 [Xorg[3874]]
> nouveau E[ PFIFO][0000:01:00.0] PGRAPH engine fault on channel 2,
> recovering...
> nouveau E[ PGRAPH][0000:01:00.0] TRAP ch 2 [0x001fcd1000 Xorg[3874]]
> nouveau E[ PGRAPH][0000:01:00.0] GPC0/TPC0/TEX: 0x80000041
>
> My hardware is: NVIDIA Corporation GF119 [Quadro NVS 4200M] (rev a1)
>
> I bisected it down to this commit:
>
> commit 29ba89b2371d466ca68973525816cf10debc2655
> Author: Maarten Lankhorst <maarten.lankhorst at ubuntu.com>
> Date: Thu Jan 9 11:03:11 2014 +0100
>
> drm/nouveau: rework to new fence interface
>
> Signed-off-by: Maarten Lankhorst <maarten.lankhorst at canonical.com>
> Acked-by: Ben Skeggs <bskeggs at redhat.com>
>
> I tried tracing the DEVICE, PGRAPH, PFIFO & PCE0 engines but nothing
> obvious stood out before the read fault shown above.
>
> Is there any other information I can provide to help track this down?
> paranoia or spam level logging, for example?
Does this patch fix things?
diff --git a/drivers/gpu/drm/nouveau/nv84_fence.c b/drivers/gpu/drm/nouveau/nv84_fence.c
index 7b372a68aa4e..2a372b08ae44 100644
--- a/drivers/gpu/drm/nouveau/nv84_fence.c
+++ b/drivers/gpu/drm/nouveau/nv84_fence.c
@@ -159,8 +159,6 @@ nv84_fence_context_new(struct nouveau_channel *chan)
ret = nouveau_bo_vma_add(bo, cli->vm, &fctx->dispc_vma[i]);
}
- nouveau_bo_wr32(priv->bo, chan->chid * 16/4, 0x00000000);
-
if (ret)
nv84_fence_context_del(chan);
return ret;
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