[PATCH v5 04/12] drm/exynos: dsi: rename pll_clk to sclk_clk

[Inki Dae]

On 2015년 04월 10일 14:55, Hyungwon Hwang wrote:
> This patch renames pll_clk to sclk_clk. The clock referenced by pll_clk
> is actually not the pll input clock for dsi. The pll input clock comes
> from the board's oscillator directly.
> 
> Signed-off-by: Hyungwon Hwang <human.hwang at samsung.com>
> ---
> Changes for v3:
> - Newly added
> 
> Changes for v4:
> - None
> 
> Changes for v5:
> - None
>  .../devicetree/bindings/video/exynos_dsim.txt      |  7 ++---
>  drivers/gpu/drm/exynos/exynos_drm_dsi.c            | 31 ++++++++--------------
>  2 files changed, 15 insertions(+), 23 deletions(-)
> 
    ...snip...
> @@ -1350,7 +1341,7 @@ static void exynos_dsi_poweroff(struct exynos_dsi *dsi)
>  
>  	phy_power_off(dsi->phy);
>  
> -	clk_disable_unprepare(dsi->pll_clk);
> +	clk_disable_unprepare(dsi->sclk_clk);
>  	clk_disable_unprepare(dsi->bus_clk);
>  
>  	ret = regulator_bulk_disable(ARRAY_SIZE(dsi->supplies), dsi->supplies);
> @@ -1713,10 +1704,10 @@ static int exynos_dsi_probe(struct platform_device *pdev)
>  		return -EPROBE_DEFER;
>  	}
>  
> -	dsi->pll_clk = devm_clk_get(dev, "pll_clk");
> -	if (IS_ERR(dsi->pll_clk)) {
> -		dev_info(dev, "failed to get dsi pll input clock\n");
> -		ret = PTR_ERR(dsi->pll_clk);
> +	dsi->sclk_clk = devm_clk_get(dev, "sclk_mipi");

As I mentioned before, this patch makes existing device tree to be
broken so this cannot be merged even though you posted an another patch
which resolves the dt broken issue. That is because each patch shouldn't
incur any problem on working. So it'd be better to integrate this patch
and patch 9.

Thanks,
Inki Dae

> +	if (IS_ERR(dsi->sclk_clk)) {
> +		dev_info(dev, "failed to get dsi sclk clock\n");
> +		ret = PTR_ERR(dsi->sclk_clk);
>  		goto err_del_component;
>  	}
>  
>