[PATCH] drm/amdkfd: Fix sparse errors
Alex Deucher
alexdeucher at gmail.com
Thu Jan 22 07:50:15 PST 2015
On Thu, Jan 22, 2015 at 6:55 AM, Oded Gabbay <oded.gabbay at amd.com> wrote:
> Signed-off-by: Oded Gabbay <oded.gabbay at amd.com>
Reviewed-by: Alex Deucher <alexander.deucher at amd.com>
> ---
> drivers/gpu/drm/amd/amdkfd/kfd_chardev.c | 16 ++++++-------
> .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.c | 28 ++--------------------
> .../gpu/drm/amd/amdkfd/kfd_device_queue_manager.h | 20 +++++++++++++---
> 3 files changed, 27 insertions(+), 37 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
> index 732087dc..5c50aa8 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_chardev.c
> @@ -141,8 +141,6 @@ static int kfd_ioctl_get_version(struct file *filep, struct kfd_process *p,
> static int set_queue_properties_from_user(struct queue_properties *q_properties,
> struct kfd_ioctl_create_queue_args *args)
> {
> - void *tmp;
> -
> if (args->queue_percentage > KFD_MAX_QUEUE_PERCENTAGE) {
> pr_err("kfd: queue percentage must be between 0 to KFD_MAX_QUEUE_PERCENTAGE\n");
> return -EINVAL;
> @@ -180,16 +178,18 @@ static int set_queue_properties_from_user(struct queue_properties *q_properties,
> return -EFAULT;
> }
>
> - tmp = (void *)(uintptr_t)args->eop_buffer_address;
> - if (tmp != NULL &&
> - !access_ok(VERIFY_WRITE, tmp, sizeof(uint32_t))) {
> + if (args->eop_buffer_address &&
> + !access_ok(VERIFY_WRITE,
> + (const void __user *) args->eop_buffer_address,
> + sizeof(uint32_t))) {
> pr_debug("kfd: can't access eop buffer");
> return -EFAULT;
> }
>
> - tmp = (void *)(uintptr_t)args->ctx_save_restore_address;
> - if (tmp != NULL &&
> - !access_ok(VERIFY_WRITE, tmp, sizeof(uint32_t))) {
> + if (args->ctx_save_restore_address &&
> + !access_ok(VERIFY_WRITE,
> + (const void __user *) args->ctx_save_restore_address,
> + sizeof(uint32_t))) {
> pr_debug("kfd: can't access ctx save restore buffer");
> return -EFAULT;
> }
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> index 99e2dbb..b189f97 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
> @@ -62,12 +62,6 @@ enum KFD_MQD_TYPE get_mqd_type_from_queue_type(enum kfd_queue_type type)
> return KFD_MQD_TYPE_CP;
> }
>
> -inline unsigned int get_pipes_num(struct device_queue_manager *dqm)
> -{
> - BUG_ON(!dqm || !dqm->dev);
> - return dqm->dev->shared_resources.compute_pipe_count;
> -}
> -
> static inline unsigned int get_first_pipe(struct device_queue_manager *dqm)
> {
> BUG_ON(!dqm);
> @@ -79,25 +73,6 @@ static inline unsigned int get_pipes_num_cpsch(void)
> return PIPE_PER_ME_CP_SCHEDULING;
> }
>
> -inline unsigned int
> -get_sh_mem_bases_nybble_64(struct kfd_process_device *pdd)
> -{
> - uint32_t nybble;
> -
> - nybble = (pdd->lds_base >> 60) & 0x0E;
> -
> - return nybble;
> -}
> -
> -inline unsigned int get_sh_mem_bases_32(struct kfd_process_device *pdd)
> -{
> - unsigned int shared_base;
> -
> - shared_base = (pdd->lds_base >> 16) & 0xFF;
> -
> - return shared_base;
> -}
> -
> void program_sh_mem_settings(struct device_queue_manager *dqm,
> struct qcm_process_device *qpd)
> {
> @@ -336,7 +311,8 @@ static int update_queue(struct device_queue_manager *dqm, struct queue *q)
> BUG_ON(!dqm || !q || !q->mqd);
>
> mutex_lock(&dqm->lock);
> - mqd = dqm->ops.get_mqd_manager(dqm, q->properties.type);
> + mqd = dqm->ops.get_mqd_manager(dqm,
> + get_mqd_type_from_queue_type(q->properties.type));
> if (mqd == NULL) {
> mutex_unlock(&dqm->lock);
> return -ENOMEM;
> diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
> index 1934795..e7b17b2 100644
> --- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
> +++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
> @@ -160,10 +160,24 @@ void device_queue_manager_init_cik(struct device_queue_manager_ops *ops);
> void device_queue_manager_init_vi(struct device_queue_manager_ops *ops);
> void program_sh_mem_settings(struct device_queue_manager *dqm,
> struct qcm_process_device *qpd);
> -inline unsigned int get_sh_mem_bases_32(struct kfd_process_device *qpd);
> -inline unsigned int get_sh_mem_bases_nybble_64(struct kfd_process_device *pdd);
> int init_pipelines(struct device_queue_manager *dqm,
> unsigned int pipes_num, unsigned int first_pipe);
> -inline unsigned int get_pipes_num(struct device_queue_manager *dqm);
> +
> +extern inline unsigned int get_sh_mem_bases_32(struct kfd_process_device *pdd)
> +{
> + return (pdd->lds_base >> 16) & 0xFF;
> +}
> +
> +extern inline unsigned int
> +get_sh_mem_bases_nybble_64(struct kfd_process_device *pdd)
> +{
> + return (pdd->lds_base >> 60) & 0x0E;
> +}
> +
> +extern inline unsigned int get_pipes_num(struct device_queue_manager *dqm)
> +{
> + BUG_ON(!dqm || !dqm->dev);
> + return dqm->dev->shared_resources.compute_pipe_count;
> +}
>
> #endif /* KFD_DEVICE_QUEUE_MANAGER_H_ */
> --
> 1.9.1
>
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