[PATCH 2/6] drm/vmwgfx: SVGA device definition update
Thomas Hellstrom
thellstrom at vmware.com
Mon Mar 9 05:30:51 PDT 2015
From: Sinclair Yeh <syeh at vmware.com>
Update device definition headers to support screen targets.
Signed-off-by: Sinclair Yeh <syeh at vmware.com>
Signed-off-by: Thomas Hellstrom <thellstrom at vmware.com>
---
drivers/gpu/drm/vmwgfx/svga3d_reg.h | 56 ++++++++++++++++++++++--
drivers/gpu/drm/vmwgfx/svga3d_surfacedefs.h | 67 +++++++++++++++++++++++++++--
2 files changed, 117 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/vmwgfx/svga3d_reg.h b/drivers/gpu/drm/vmwgfx/svga3d_reg.h
index f58dc7d..a0b9b26 100644
--- a/drivers/gpu/drm/vmwgfx/svga3d_reg.h
+++ b/drivers/gpu/drm/vmwgfx/svga3d_reg.h
@@ -1,5 +1,5 @@
/**********************************************************
- * Copyright 1998-2009 VMware, Inc. All rights reserved.
+ * Copyright 1998-2014 VMware, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
@@ -224,7 +224,7 @@ typedef enum SVGA3dSurfaceFormat {
SVGA3D_R8_SNORM = 95,
SVGA3D_R8_SINT = 96,
SVGA3D_A8_UNORM = 32,
- SVGA3D_R1_UNORM = 97,
+ SVGA3D_P8 = 97,
SVGA3D_R9G9B9E5_SHAREDEXP = 98,
SVGA3D_R8G8_B8G8_UNORM = 99,
SVGA3D_G8R8_G8B8_UNORM = 100,
@@ -1312,6 +1312,11 @@ struct {
typedef enum {
SVGA3D_SURFACE_CUBEMAP = (1 << 0),
+
+ /*
+ * HINT flags are not enforced by the device but are useful for
+ * performance.
+ */
SVGA3D_SURFACE_HINT_STATIC = (1 << 1),
SVGA3D_SURFACE_HINT_DYNAMIC = (1 << 2),
SVGA3D_SURFACE_HINT_INDEXBUFFER = (1 << 3),
@@ -1322,6 +1327,50 @@ typedef enum {
SVGA3D_SURFACE_HINT_WRITEONLY = (1 << 8),
SVGA3D_SURFACE_MASKABLE_ANTIALIAS = (1 << 9),
SVGA3D_SURFACE_AUTOGENMIPMAPS = (1 << 10),
+ SVGA3D_SURFACE_DECODE_RENDERTARGET = (1 << 11),
+
+ /*
+ * Is this surface using a base-level pitch for it's mob backing?
+ *
+ * This flag is not intended to be set by guest-drivers, but is instead
+ * set by the device when the surface is bound to a mob with a specified
+ * pitch.
+ */
+ SVGA3D_SURFACE_MOB_PITCH = (1 << 12),
+
+ SVGA3D_SURFACE_INACTIVE = (1 << 13),
+ SVGA3D_SURFACE_HINT_RT_LOCKABLE = (1 << 14),
+ SVGA3D_SURFACE_VOLUME = (1 << 15),
+
+ /*
+ * Required to be set on a surface to bind it to a screen target.
+ */
+ SVGA3D_SURFACE_SCREENTARGET = (1 << 16),
+
+ /*
+ * Align images in the guest-backing mob to 16-bytes.
+ */
+ SVGA3D_SURFACE_ALIGN16 = (1 << 17),
+
+ SVGA3D_SURFACE_1D = (1 << 18),
+ SVGA3D_SURFACE_ARRAY = (1 << 19),
+
+ /*
+ * Bind flags.
+ * These are enforced for any surface defined with DefineGBSurface_v2.
+ */
+ SVGA3D_SURFACE_BIND_VERTEX_BUFFER = (1 << 20),
+ SVGA3D_SURFACE_BIND_INDEX_BUFFER = (1 << 21),
+ SVGA3D_SURFACE_BIND_CONSTANT_BUFFER = (1 << 22),
+ SVGA3D_SURFACE_BIND_SHADER_RESOURCE = (1 << 23),
+ SVGA3D_SURFACE_BIND_RENDER_TARGET = (1 << 24),
+ SVGA3D_SURFACE_BIND_DEPTH_STENCIL = (1 << 25),
+ SVGA3D_SURFACE_BIND_STREAM_OUTPUT = (1 << 26),
+
+ /*
+ * Marker for the last defined bit.
+ */
+ SVGA3D_SURFACE_FLAG_MAX = (1 << 27),
} SVGA3dSurfaceFlags;
typedef
@@ -2402,6 +2451,7 @@ struct {
int32 xRoot;
int32 yRoot;
uint32 flags;
+ uint32 dpi;
} __packed
SVGA3dCmdDefineGBScreenTarget; /* SVGA_3D_CMD_DEFINE_GB_SCREENTARGET */
@@ -2421,7 +2471,7 @@ SVGA3dCmdBindGBScreenTarget; /* SVGA_3D_CMD_BIND_GB_SCREENTARGET */
typedef
struct {
uint32 stid;
- SVGA3dBox box;
+ SVGA3dRect rect;
} __packed
SVGA3dCmdUpdateGBScreenTarget; /* SVGA_3D_CMD_UPDATE_GB_SCREENTARGET */
diff --git a/drivers/gpu/drm/vmwgfx/svga3d_surfacedefs.h b/drivers/gpu/drm/vmwgfx/svga3d_surfacedefs.h
index ef33850..d55ab01 100644
--- a/drivers/gpu/drm/vmwgfx/svga3d_surfacedefs.h
+++ b/drivers/gpu/drm/vmwgfx/svga3d_surfacedefs.h
@@ -608,9 +608,9 @@ static const struct svga3d_surface_desc svga3d_surface_descs[] = {
{1, 1, 1}, 1, 1, {8, {{0}, {0}, {8}, {0} } },
{{{0}, {0}, {0}, {0} } } }, /* SVGA3D_R8_SINT */
- {SVGA3DBLOCKDESC_RED,
- {8, 1, 1}, 1, 1, {8, {{0}, {0}, {8}, {0} } },
- {{{0}, {0}, {0}, {0} } } }, /* SVGA3D_R1_UNORM */
+ {SVGA3DBLOCKDESC_NONE,
+ {1, 1, 1}, 1, 1, {8, {{0}, {0}, {8}, {0} } },
+ {{{0}, {0}, {0}, {0} } } }, /* SVGA3D_P8 */
{SVGA3DBLOCKDESC_RGBE,
{1, 1, 1}, 4, 4, {32, {{9}, {9}, {9}, {5} } },
@@ -910,3 +910,64 @@ svga3dsurface_get_image_offset(SVGA3dSurfaceFormat format,
return offset;
}
+
+
+/**
+ * svga3dsurface_is_gb_screen_target_format - Is the specified format usable as
+ * a ScreenTarget?
+ * (with just the GBObjects cap-bit
+ * set)
+ * @format: format to queried
+ *
+ * RETURNS:
+ * true if queried format is valid for screen targets
+ */
+static inline bool
+svga3dsurface_is_gb_screen_target_format(SVGA3dSurfaceFormat format)
+{
+ return (format == SVGA3D_X8R8G8B8 ||
+ format == SVGA3D_A8R8G8B8 ||
+ format == SVGA3D_R5G6B5 ||
+ format == SVGA3D_X1R5G5B5 ||
+ format == SVGA3D_A1R5G5B5 ||
+ format == SVGA3D_P8);
+}
+
+
+/**
+ * svga3dsurface_is_dx_screen_target_format - Is the specified format usable as
+ * a ScreenTarget?
+ * (with DX10 enabled)
+ *
+ * @format: format to queried
+ *
+ * Results:
+ * true if queried format is valid for screen targets
+ */
+static inline bool
+svga3dsurface_is_dx_screen_target_format(SVGA3dSurfaceFormat format)
+{
+ return (format == SVGA3D_R8G8B8A8_UNORM ||
+ format == SVGA3D_B8G8R8A8_UNORM ||
+ format == SVGA3D_B8G8R8X8_UNORM);
+}
+
+
+/**
+ * svga3dsurface_is_screen_target_format - Is the specified format usable as a
+ * ScreenTarget?
+ * (for some combination of caps)
+ *
+ * @format: format to queried
+ *
+ * Results:
+ * true if queried format is valid for screen targets
+ */
+static inline bool
+svga3dsurface_is_screen_target_format(SVGA3dSurfaceFormat format)
+{
+ if (svga3dsurface_is_gb_screen_target_format(format)) {
+ return true;
+ }
+ return svga3dsurface_is_dx_screen_target_format(format);
+}
--
2.1.0
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